Tag Archives: models

Mentor Graphics to Open Source BridgePoint UML Editor

Mentor Graphics will place the front-end UML editor of their BridgePoint xtUML environment into the open source domain. The availability of BridgePoint as an open source editor will enable the industry’s movement from static UML diagrams and paper-based processes to executable model-driven flows. Over time, Mentor Graphics expects the BridgePoint open source UML editor to become the de facto standard for UML trainers and educators.

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Synopsys and Applied Materials Develop Technology Computer-Aided Design Models

Synopsys team with Applied Materials to create technology computer-aided design (TCAD) models for next-generation semiconductor devices. The models derived from this TCAD collaboration will enable engineers to speed up process development for 14-nanometer (nm) and 11-nm logic and new memory chip technologies. This will reduce cost and speed time-to-market.

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Cadence Design Systems Expands Verification IP Catalog

Cadence Design Systems has expanded their portfolio of verification IP (VIP) and memory models for SoC, and System-level verification engineers and designers. The expanded Cadence VIP offering now supports all major third party simulators. As a result, Cadence offers designers a one-stop shop of mainstream and emerging protocols for developing and verifying advanced electronic designs.

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ARM Selects Magma SiliconSmart Characterization, Modeling Software

Magma Design Automation Inc. (Nasdaq: LAVA), a provider of chip design software, announced that ARM (LSE: ARM; Nasdaq: ARMHY) has successfully utilized Magma’s SiliconSmart characterization and modeling software suite to enhance and expand ARM’s production characterization system for Physical IP products. This fast, accurate and easy-to-use characterization system will assist ARM in delivering standard cell and I/O libraries.

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MathWorks Code Generation Tools Support Eclipse, Embedded Linux

MathWorks announced that its Target Support Package and Embedded IDE Link products now support the Eclipse integrated development environment (IDE) and Embedded Linux through the GNU compiler tool chain. As a result, engineers can automate project creation in Eclipse and deploy real-time embedded systems on Linux using automatically generated code from MATLAB and Simulink models. These capabilities enable engineers using Model-Based Design to rapidly implement and verify algorithms on processors that can run Embedded Linux, such as ARM, Freescale, and Intel.

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STMicroelectronics Offers Free Version of Cadence OrCAD PSpice

Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic design innovation, announced that STMicroelectronics, a global leader in integrated circuits for communications, consumer, computer, automotive and industrial applications, has selected Cadence® OrCAD® PSpice® technology to provide simulation capabilities to its customers to evaluate the company’s analog and power IC’s.

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Imperas Creates Models for MIPS32 M14K, M14Kc Processor Cores

Imperas released models of the new MIPS32® M14K[tm] and M14Kc[tm] processor cores from MIPS Technologies, Inc., including example virtual platforms utilizing these cores and support for the cores in Imperas’ advanced software development tools. The M14K family of processors is the first to support the new microMIPS code compression instruction set architecture (ISA) from MIPS Technologies, which is fully supported in the Imperas models. MIPS Technologies has verified the functionality of these models under the MIPS-Verified[tm] program.

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Carbon Design Systems Unveils Databahn DDR SDRAM Controller IP Models

Denali Software, Inc., a leading provider of intellectual property (IP) and electronic design automation (EDA) software, and Carbon Design Systems announced a collaboration to provide designers with cycle-accurate models of Denali’s configurable Databahn[TM] DDR SDRAM controller IP for virtual platforms. Databahn IP models are available today for use with leading system simulation environments (including Carbon SoC Designer, CoWare Platform Architect, and OSCI SystemC) to perform architectural analysis, validate system performance, and perform hardware/software integration prior to silicon.

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Open Virtual Platforms Rolls Out Virage Logic ARC Processors Models

The Open Virtual Platforms (OVP) initiative has announced the release of models of Virage Logic’s ARC processor cores. Models of the Virage Logic ARC® 600 and ARC® 700 families of processor cores have been released, including the ARC® 605. Additionally, Virage Logic and Imperas have cooperated on the verification of the functionality of the models. Virage Logic’s ARC line of processor cores, the world’s second most widely used processor architecture, are commonly used in audio and video subsystems, and in flash controllers, among other applications.

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Synopsys Gains Virtual Prototyping Solutions by Acquiring VaST Systems

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, announced it has acquired VaST Systems Technology Corporation to extend its virtual prototyping solutions into the automotive and consumer application space. The acquisition adds a comprehensive set of processor sub-system models frequently found in automotive and consumer applications to Synopsys’ virtual prototyping portfolio. Processor sub-system models allow developers to accelerate the virtualization of electronic systems and to start software development nine to 12 months prior to the availability of silicon.

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