Open Core Protocol International Partnership (OCP-IP), the organization delivering a common standard for intellectual property core interfaces that facilitate “plug and play” SoC design, and CircuitSutra, experts in SystemC modeling and embedded software development, along with Imperas, the company providing the infrastructure for the future of software virtual platforms and enabling the next generation of embedded software development, announced the availability of a Virtual Platform Demo created utilizing OCP-IP’s advanced Modeling Kit. This example platform acts as a guide to OCP-IP members enabling them to quick-start their ESL activities using the OCP-IP TLM Modeling Kit; which is fully compatible with OSCI’s TLM 2.0.1. Both the kit and Virtual Platform examples are free to both OCP-IP members and non-members.
Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, announced the open source availability of its widely used Interconnect Technology Format (ITF) for parasitic modeling and the formation of a technical advisory board (TAB) under the auspices of IEEE Industry Standards and Technology Organization (IEEE-ISTO). The purpose of the Interconnect Modeling TAB (IMTAB) is to facilitate the evolution of ITF and promote an interoperable interconnect modeling format to address the industry’s advancing process technology and design needs. IMTAB founding members include representatives from industry-leading semiconductor companies, EDA companies and silicon foundries including Altera Corporation, AMD, Apache Design Solutions, GLOBALFOUNDRIES, LSI Corporation, Magma Design Automation, NVIDIA, Qualcomm, STMicroelectronics and Synopsys. Following the same model as the industry-standard Liberty[TM] library modeling format, ITF access is granted under an open source license through Synopsys’ Technology Access Program (TAP-in(SM)) and is available free of charge to anyone.
Mentor Graphics Corporation (NASDAQ: MENT) announced that the Calibre® nmLVS product now provides comprehensive support for the iLVS interoperable rule specification used by TSMC for new design kits. This allows customers to define and customize complex IC design rules, as needed, while maintaining compliance with TSMC specifications and allowing seamless adoption of EDA vendor performance optimizations.
Magma Design Automation Inc. (Nasdaq: LAVA), a provider of chip design software, announced that ARM (LSE: ARM; Nasdaq: ARMHY) has successfully utilized Magma’s SiliconSmart characterization and modeling software suite to enhance and expand ARM’s production characterization system for Physical IP products. This fast, accurate and easy-to-use characterization system will assist ARM in delivering standard cell and I/O libraries.
Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic design innovation, announced that it has contributed to the Accellera standards organization new technology that can help engineers conduct faster and more thorough functional verification on complex mixed-signal SoCs. Cadence® donated a set of extensions to the wreal feature of the Verilog-AMS real numbered modeling capability. These Cadence extensions are designed to improve accuracy and offer better plug-and-play with analog models. Wreal enables engineers to conduct functional verification on these SoCs at digital speed. Faster and deeper verification can translate to fewer re-spins and faster time to market.
dSPACE and EB (Elektrobit), a leading developer of cutting-edge embedded technology solutions for automotive and wireless industries, announced further harmonization of their AUTOSAR tools. This cooperation offers developers of automotive electronic control unit (ECU) software a coordinated tool chain. Using the integrated AUTOSAR modeling and simulation environment SystemDesk, the TargetLink production ready code generator, and the EB tresos Studio configuration tool, developers can efficiently use a model-based approach to designing software, culminating in production-ready AUTOSAR ECU software.
Atego, the leading independent supplier of industrial-grade, modeling and development tools for complex, mission and safety-critical embedded systems and software has acquired Blue River Software GmbH, extending its embedded development software portfolio to now include C++ tools. Atego’s acquisition of Blue River closely follows its creation from the recent merger between Artisan Software Tools and Aonix. The acquisition also demonstrates Atego’s effectiveness at delivering on its growth strategyas a platform for market consolidation.
CoFluent Design, a leading Electronic System Level (ESL) company that provides system-level modeling and simulation to accelerate innovation in embedded devices, and No Magic, Inc., the leading global provider of integrated modeling software and services, announced that they have initiated a partnership agreement to integrate the MagicDraw UML (Unified Modeling Language) modeler with the CoFluent Studio embedded system modeling and SystemC-based simulation environment.
EVE, the leader in hardware/software co-verification and developer of ZeBu-Server, a scalable and affordable emulation system, announced that it will sponsor the 5th Annual Workshop on Architectural Research Prototyping (WARP) to be held June 19 in Saint-Malo, France. It will be collocated with the ACM IEEE International Symposium Computer Architecture (ISCA).
Artisan® Software Tools and Aonix® have merged to create a new, stronger independent force in the mission- and safety-critical systems and software development tools market. The merged company is named Atego and headquartered in San Diego CA, USA. Artisan Software Tools is the world’s largest independent supplier of industrial-grade, collaborative modeling tools for complex, mission and safety-critical systems and software and Aonix is a leading supplier of critical systems development tools, virtual machines and services for real-time/embedded Java and Ada solutions.