Tag Archives: MIPS Technologies

MIPS Technologies Debuts Release 5 of MIPS Architecture

MIPS Technologies ~ Release 5 (R5) of the MIPS architecture

MIPS Technologies introduced Release 5 (R5) of the MIPS architecture. R5 encompasses the MIPS32, MIPS64 and microMIPS instruction set architectures. The release incorporates important functionality including virtualization and SIMD (Single Instruction Multiple Data) modules. Key features of the MIPS architecture R5 specification are available for licensing now. Several MIPS licensees already have products in development. These features are expected to be added to MIPS processors in the coming year.

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MIPS Prodigy 64-Bit Multi-threaded Multiprocessor IP Core

MIPS Technologies will offer an IP core that combines a 64-bit processor architecture with simultaneous multi-threading (SMT) technology. Code named Prodigy, the IP family enables engineers to quickly and easily develop MIPS64 solutions at a fraction of the cost and time it would take to develop a 64-bit core themselves. The 64-bit core will be available later this year.

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MIPS, Open-Silicon, Dolphin Tapeout ASIC CPU at 2.4GHz and Beyond

Open-Silicon, Inc., MIPS Technologies, Inc. (NASDAQ: MIPS), and Dolphin Technology announced the successful tapeout of a high-performance ASIC processor at over 2.4GHz under typical conditions. This achievement, as measured in timing closure against TSMC reference flow signoff conditions, will make this one of the highest frequency ASIC processors ever built, highlighting the companies’ industry-leading technologies for building high-performance processor-based systems. This high-performance ASIC processor is a follow-on test chip to the 65nm, 1.1GHz test chip announced by Open-Silicon and MIPS Technologies at the end of last year.

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MIPS Supports Symmetric Multiprocessing on Android Platform

MIPS Technologies, Inc. (NASDAQ: MIPS), a leading provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, announced symmetric multiprocessing (SMP) support for the Android[TM] platform running on MIPS-Based[TM] multicore SoCs. Now MIPS licensees using MIPS32® multi-threaded and multiprocessor cores can bring rich web and multimedia content to smartphones with the Android platform.

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MIPS Technologies Supports WebM Project, VP8 Video Codec

MIPS Technologies, Inc. (NASDAQ: MIPS), a leading provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, announced support for the new WebM open web media project and the open source VP8, a high performance video codec that will bring high-quality video content and experiences to web-connected devices. MIPS Technologies will work with its partners and licensees to ensure fully optimized hardware/software support for VP8. WebM and the open sourcing of VP8 were announced separately by Google and partners.

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Imperas Creates Models for MIPS32 M14K, M14Kc Processor Cores

Imperas released models of the new MIPS32® M14K[tm] and M14Kc[tm] processor cores from MIPS Technologies, Inc., including example virtual platforms utilizing these cores and support for the cores in Imperas’ advanced software development tools. The M14K family of processors is the first to support the new microMIPS code compression instruction set architecture (ISA) from MIPS Technologies, which is fully supported in the Imperas models. MIPS Technologies has verified the functionality of these models under the MIPS-Verified[tm] program.

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MIPS Technologies, Virage Logic Optimize Embedded Memory IP

MIPS Technologies (Nasdaq: MIPS), a leading provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, and Virage Logic Corporation (Nasdaq: VIRL), the semiconductor industry’s trusted IP partner, announced they are teaming to offer optimized embedded memory IP for joint customers. With SRAM memory instances from the Virage Logic ASAP[TM] 90nm and SiWare[TM] 65GP High Density SRAM compiler families specifically optimized for MIPS32® processors, customers can speed development of complex SoCs targeted for Blu-ray DVD, HDTV, IPTV, set-top box and broadband customer premises equipment (CPE) devices.

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Digital Media Professionals Joins MIPS Alliance Program for Android

MIPS Technologies, Inc. (Nasdaq: MIPS), a leading provider of industry-standard processor architectures and cores for home entertainment, communications, networking and portable multimedia markets, and Digital Media Professionals Inc. (DMP), a leading provider of 3D/2D graphics cores for digital consumer, automotive, industrial, and entertainment applications, announced that DMP has become a member of the MIPS Alliance Program for its Android on MIPS initiative. The alliance will ultimately enable SoC developers to create MIPS-Based SoCs with DMP PICA/SMAPH series graphics IP cores.

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QEMU Emulator, Arriba Tools for QEMU, Android Native Development Kit

MIPS Technologies, Inc. (Nasdaq: MIPS), a leading provider of industry-standard processor architectures and cores for home entertainment, communications, networking and portable multimedia markets, announced availability of advanced debug and development tools that simplify Android application development. These tools are free-of-charge through the Android on MIPS community. MIPS Technologies is making available the QEMU open source emulator, and through its partnership with Viosoft® Corporation, offering industry-leading Arriba development tools for QEMU to make development even easier. MIPS Technologies has also enhanced the Android Native Development Kit (NDK) for the MIPS® architecture to include a compiler and a rich graphical user interface (GUI) that streamlines the entire build process to a simple point-and-click for fast native development.

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MIPS to Develop Optimized Reference Platform for Yahoo! Widget Engine

MIPS Technologies, Inc. (Nasdaq: MIPS), a leading provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, announced integration of an optimized Yahoo! Widget Engine for MIPS-Based digital home devices. MIPS will develop an optimized reference platform running the Yahoo! Widget Engine for digital TV and set-top box applications. Leveraging this reference implementation, MIPS® licensees will be able to quickly develop devices incorporating Yahoo! TV Widgets. Yahoo! TV Widgets enable popular Internet services and online media to reach viewers through applications specifically tailored to the needs of the television watcher.

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