Cadence Design Systems has acquire Cosmic Circuits. The IC and Systems business of Cosmic Circuits will be spun off into a separate new company to be owned by certain existing shareholders of Cosmic Circuits. The acquisition is expected to close in 30 to 60 days, and is not expected to have a material impact on Cadence’s 2013 results of operations. Terms of the transaction were not disclosed.
Cadence Design Systems’ design IP portfolio now includes intellectual property for the LPDDR3 mobile memory standard. As part of the LPDDR3 launch, Cadence has upgraded the bandwidth management engine, Placement Queue 2.2, to optimize the way memory is accessed to improve overall system performance and power consumption. In addition to LPDDR3, Cadence offers IP for other mobile and non-mobile memory standards in high demand by SoC designers, including Wide I/O and DDR4.
Protecode(R), Inc., creator of the world’s fastest and most reliable software Intellectual Property (IP) engine, launched the Library IP Auditor (LA), an extension to the Protecode Enterprise IP Analyzer (EA) product in its flagship product suite of IP assessment tools. The addition of this product is in response to the growing usage of open source and other third-party content in enterprises and the interest in integrating applications with existing development processes.
The IEEE, Accellera and The SPIRIT Consortium, announced that the IEEE has approved a record number of Accellera and The SPIRIT Consortium Electronic Design Automation (EDA) and Intellectual Property (IP) standards in 2009.
NXP Semiconductors and Virage Logic Corporation (NASDAQ:VIRL) announced a strategic agreement that accelerates NXP’s move to high performance mixed signal leadership and further broadens Virage Logic’s extensive semiconductor IP portfolio. The agreement calls for the transfer of a part of NXP’s advanced CMOS intellectual property rights and certain engineering talent and equipment to Virage Logic. This arrangement includes a long-term licensing and IP development relationship between the two companies, enabling NXP to significantly reduce costs without compromising its design capability. Virage Logic will establish an R&D center in Eindhoven providing on-going support to NXP and developing new products based on the acquired advanced CMOS I/O, analog mixed signal and System-on-Chip (SoC) infrastructure IP. These new products, expected to be commercially available in early 2011, further the company’s leadership position as the largest independent IP provider to the semiconductor industry.
ASIC North, Inc., a VLSI design service company, announced that it has entered the analog intellectual property (IP) market. In a move to enhance its analog/mixed-signal (A/MS) design services, ASIC North now offers IP for high performance, low power analog-to-digital converters (ADC). The hardened analog cores target the 180nm high-voltage technology being co-developed by IBM Microelectronics and austriamicrosystems. ASIC North’s ADC cores support the next generation A/MS design implementations in the high-voltage, 180nm silicon technology.