Tag Archives: DesignWare

Synopsys, Arteris Team on IP Solution for MIPI Alliance Low Latency Interface

Synopsys and Arteris recently teamed on a joint analog and digital IP solution to implement the MIPI Alliance Low Latency Interface (LLI) 1.0 specification. The early integration and availability of the Arteris and Synopsys solution helps speed time to market for MIPI LLI adopters. Arteris and Synopsys’ joint MIPI LLI IP solution is available now for select early access customers. System hardware implementing the joint solution will be available in the second half of 2012.

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First-Pass Silicon Success: Synopsys DesignWare 96 dB Hi-Fi Audio IP

Synopsys’ DesignWare 96 dB Hi-Fi Audio IP has achieved first-pass silicon success in 65-nanometer (nm) and 55-nm process technologies for multiple foundries. The silicon-proven audio IP is ideal for consumer electronic system-on-chip (SoC) applications such as portable media players, smart phones, CD/DVD/ Blu-Ray Disc players/recorders, digital TV and digital cameras. The Synopsys DesignWare 96 dB Hi-Fi Audio IP in 65-nm and 55-nm processes is available now for multiple foundries.

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Synopsys DesignWare Data Converter IP Solutions

Synopsys introduced their DesignWare Data Converter IP solutions. The DesignWare Data Converter IP solutions are available now for the 65-nm LP process. Support for the 40-nm LP process will be available in the second quarter. DesignWare data converters for broadband communication applications are also available now in the 65-nm LP and 40-nm LP processes. The Synopsys IP solutions are optimized for mobile broadband wireless communication applications like WiFi, WiMAX, LTE, and digital TV reception.

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Synopsys Unveils Configurable DesignWare MIPI DSI Host Controller IP

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, announced the immediate availability of DesignWare® IP for the Mobile Industry Processor Interface (MIPI®) Display Serial Interface (DSI) Host Controller . With this latest addition, Synopsys broadens its DesignWare MIPI IP portfolio consisting of the DigRFSM v3 (2.5G/3.0G) and DigRFSM v4 (4G), CSI-2, M-PHY and D-PHY protocols. The DesignWare MIPI DSI Host Controller is fully compliant to the latest MIPI Alliance specifications for DSI, Display Pixel Interface (DPI-2), Display Bus Interface (DBI-2) and Display Command Set (DCS). Using a single-vendor solution for DSI display subsystems lowers integration risk and cost while speeding time-to-market of mobile systems-on-chip (SoCs).

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Synopsys, SMIC Announce SoC Reference Flow for 65nm Process

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, and Semiconductor Manufacturing International Corporation (“SMIC”; NYSE: SMI; SEHK: 981), announced that they have delivered a comprehensive solution for system-on-chip (SoC) design for SMIC’s advanced 65-nanometer (nm) process. The solution integrates Synopsys’ broad DesignWare[tm] interface and analog IP portfolio plus other foundation IP with Synopsys’ Galaxy[tm] Implementation Platform, in a tuned reference flow. The companies have also begun work on their 40-nm design solution. Based on collaboration agreements for 65-nm and 40-nm, SMIC has selected Synopsys as the main supplier for design implementation software and IP solutions consisting of digital controllers, PHYs and analog IP.

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DesignWare HDMI 1.4a Tx Controller, PHY IP Receive HDMI Certification

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, announced that Synopsys’ DesignWare® High-Definition Multimedia Interface[tm] (HDMI[tm]) 1.4a Transmitter (Tx) digital controller and PHY IP solutions in the 40-nanometer (nm) process node have achieved certification from an HDMI Authorized Training Center (ATC). The DesignWare HDMI PHY IP achieved HDMI 1.4a compliance by passing all process, voltage and temperature variation tests, which are key certification requirements for environmental robustness. Synopsys’ fully compliant HDMI 1.4a Tx solution is now available in more than 10 process technologies, ranging from 90-nm to 40-nm. With support for the latest HDMI 1.4a specification features such as all eight 3D formats, HDMI Ethernet and Audio Return Channel (HEAC) and real-time content signaling, the DesignWare HDMI 1.4a Tx controller and PHY IP enable system-on-chip (SoC) designers and device manufacturers to quickly incorporate advanced functionality into their multimedia source applications with less risk and improved time-to-market.

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Synopsys DesignWare SATA IP Passes SATA-IO Interoperability Testing

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, announced that Synopsys’ DesignWare® Serial Advanced Technology Attachment (SATA) IP solution has successfully passed the SATA International Organization (SATA-IO) electrical, digital and system interoperability testing for 130- to 40-nanometer (nm) process technologies. The SATA-IO interoperability testing validates Synopsys’ internal testing of the DesignWare SATA IP, which includes extensive digital and mixed-signal simulation validation, hardware FPGA-based prototyping using Synopsys’ HAPS® solution, and PHY test chip silicon characterization.

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Synopsys Introduces DesignWare MIPI M-PHY IP

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, announced immediate availability of the DesignWare® MIPI M-PHY® IP for next-generation high-speed interfaces based on the newly ratified MIPI® Alliance M-PHY specification. With this latest addition to the DesignWare MIPI IP portfolio, Synopsys is the first provider to offer a comprehensive solution of a controller and PHY IP for both the MIPI DigRF(SM) v3 (2.5G/3.0G) and v4 (4G) standards. Incorporating both standards in a mobile device brings the benefit of the faster 4G standards while preserving broad coverage by using 2.5G/3.0G as a fallback mode. The configurable MIPI DigRF V4 Master Controller and M-PHY hard macro are compliant to the MIPI Alliance specifications. Utilizing a single-vendor solution enables designers to lower the risk and cost of integrating these MIPI interfaces into baseband and application processor integrated circuits (ICs), speeding time-to-market of advanced semiconductor solutions for LTE and Mobile WiMAX.

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Synopsys Creates DesignWare USB Software Alliance Program

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design and manufacturing, announced the launch of the DesignWare® USB Software Alliance Program with leading USB software providers emsys, Jungo, MCCI and MicroDigital as inaugural members. This alliance program establishes an ecosystem of qualified USB software providers for drivers, firmware and stacks which have proven interoperability with Synopsys’ DesignWare USB 2.0 and SuperSpeed USB 3.0 IP. Synopsys and its DesignWare USB Software Alliance Program members can help designers to quickly incorporate USB connectivity into their system-on-chips (SoCs) with less risk and provide consumers with the plug-and-play functionality required for PCs, peripherals, mobile devices and consumer electronic products.

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GLOBALFOUNDRIES, Synopsys Team on DesignWare Interface PHY IP for 28nm

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, and GLOBALFOUNDRIES, a leading provider of advanced semiconductor technology and manufacturing services, announced an agreement to develop the Synopsys DesignWare® SuperSpeed USB (3.0), USB 2.0, HDMI 1.4 Tx and Rx, DDR3/2, PCI Express® 2.0 and 1.1, SATA 1.5/3 Gbps and 6 Gbps, and XAUI PHY IP for GLOBALFOUNDRIES’ 28-nanometer (nm) “Gate First” High-k Metal Gate (HKMG) process technologies. The collaboration will enable mutual customers to differentiate their 28nm designs with a high-quality IP portfolio targeted at next-generation electronic system-on-chips (SoCs). The long-standing relationship between the two companies has resulted in the successful development of DesignWare PHY IP from 180-nm to 32-nm process technologies. GLOBALFOUNDRIES and Synopsys are the first to announce the development of USB, PCI Express, DDR, HDMI, SATA and XAUI PHY IP targeting 28-nm process technologies with scalability to future generations.

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