ams announced the AS3435 and AS3415 ANC speaker drivers. The devices will enable a new generation of noise cancellation stereo headsets with zero audible hiss. The AS3415 and AS3435 ANC speaker driver ICs are available for sampling now. The AS3435 feedback ANC IC is priced at $3.90 for 1,000 pieces. The AS3415 feed-forward ANC IC is priced at $3.50 for 1,000 pieces. The AS3435 is in a QFN36 package, and the AS3415 in a QFN32 package, both 5mm x 5mm.
Cadence Design Systems has acquire Cosmic Circuits. The IC and Systems business of Cosmic Circuits will be spun off into a separate new company to be owned by certain existing shareholders of Cosmic Circuits. The acquisition is expected to close in 30 to 60 days, and is not expected to have a material impact on Cadence’s 2013 results of operations. Terms of the transaction were not disclosed.
Berkeley Design Automation released their Analog FastSPICE AMS. AFS AMS combines the foundry certified Analog FastSPICE circuit simulator with any leading Verilog hardware description language (HDL) simulator to provide full Verilog-AMS language support. It offers simple, fast, and accurate verification of complex nanometer-scale mixed-signal circuits.
Cadence Design Systems has enhanced their Virtuoso-based custom/analog flow. The expanded custom/analog flow helps designers manage design parasitics, a DFM capability integrated within the Virtuoso environment, and the integrated Virtuoso Power System. The new features increase productivity across the entire flow from initial design specification to final GDSII and for process nodes down to 20 nanometers. The custom analog flow includes Virtuoso Schematic Editor, Virtuoso Analog Design Environment, Virtuoso Multi-Mode Simulation technologies, Virtuoso Layout Suite, Virtuoso Power System, and Virtuoso DFM.
Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, and TowerJazz (NASDAQ: TSEM, TASE: TSEM), the global specialty foundry leader, announced that they have collaborated to qualify Synopsys’ custom design solution with TowerJazz’s 180-nanometer (nm) power management (PM) interoperable process design kit (iPDK) and analog/mixed-signal (AMS) PM reference flow. The qualified solution from Synopsys includes the Galaxy Custom Designer® implementation, HSPICE® circuit simulation, CustomSim[tm] FastSPICE simulation, and StarRC[tm] parasitic extraction tools. The TowerJazz AMS PM Reference Flow with the 180-nm iPDK provides mutual customers with a comprehensive, productive and open custom design solution.
The streams of data coming-out of present-day simulation systems during design checking is overwhelming for developers of Virtual Components (ViC) as well as integrators of Systems-on-Chip (SoC) and system architects embedding them into complete systems. The new technology of “detectors” enables parallel and automated data mining with cumulated know-how for circuit property analysis.
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, announced that STMicroelectronics, a global leader in integrated circuits for communications, consumer, computer, automotive and industrial applications, has standardized on Cadence® QRC Extraction for their 40-nanometer custom/analog designs. A key component of the Cadence digital and analog/mixed signal design flow, QRC Extraction enables faster turnaround time, scalability through its multi-core backplane, increased accuracy to silicon and capabilities to address the needs for advanced layout parasitic extraction in leading-edge technology node design.
Mentor Graphics Corporation (NASDAQ: MENT) announced that X-FAB Silicon Foundries now supports Mentor’s Olympus-SoC[tm] place and route system across X-FAB’s wide range of advanced modular CMOS process technologies for digital and analog/mixed-signal (AMS) applications. The Olympus-SoC system efficiently meets place and route challenges of sophisticated mixed-signal designs targeting X-FAB processes at 0.35 and 0.18 micrometers. Features in the Olympus-SoC product, such as multi-corner-multi-mode (MCMM) optimization for timing, power and signal integrity, on-chip variation support, concurrent timing and leakage optimization, and MCMM clock tree synthesis (CTS), ensure the largest and most complex designs can be fully optimized for performance, power and reliability, and made extremely robust for high-yield manufacturing.
Magma® Design Automation (Nasdaq: LAVA), a provider of chip design software, announced TSMC has validated the Titan[tm] Mixed-Signal Design Platform and FineSim[tm] SPICE and FineSim Pro circuit simulation products for TSMC’s first Analog/Mixed-Signal (AMS) Reference Flow inclusion, targeting its most advanced 28-nanometer (nm) process technology. The TSMC AMS Reference Flow 1.0 aims to address advanced process effects to accelerate next-generation analog/mixed-signal IC designs. The combination of the AMS Reference Flow and Magma’s Titan Mixed-Signal Design Platform and FineSim circuit simulator provide users with an integrated front-end and back-end analog design solution that accelerates time-to-market by improving designer productivity and enabling analog design reuse.
Taiwan Semiconductor Manufacturing Company, Ltd. (TWSE: 2330, NYSE: TSM) introduced Reference Flow 11.0 and Analog/Mixed Signal (AMS) Reference Flow 1.0. Both are key collaborative components of TSMC’s recently-announced extension of its Open Innovation Platform[TM]. Reference Flow 11.0, focuses on Electronic System Level (ESL) design, SoC Interconnect Fabric, and two dimensional and three dimensional integrated circuits (2-D/3-D ICs) using through silicon via (TSV) technology. AMS Reference Flow 1.0 offers advanced multi-vendor AMS design flow fully integrated with an innovative TSMC AMS design package to manage the growing complexity of process effects as well as design complexity at 40nm and 28nm process nodes.