'SIP' Category Archive

Cypress Announces Online Solutions Library for PSoC Designs

Posted by EDA Geek News Staff in SIP on Wednesday, May 7, 2008

Cypress Semiconductor Corp. (NYSE:CY) announced an online solutions library of intellectual property addressing a wide range of applications and functions. The new Cypress Solutions Library website is a free resource of user-generated IP that can be easily replicated for quick, effective design with Cypress's flexible, programmable PSoC® architecture, as well as for designs using Cypress's USB and proprietary 2.4-GHz WirelessUSB[tm] technologies. The library can be accessed from the "Solutions" tab on the Cypress company website.

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3Leaf Systems Selects Virage Logic Intelli DDR Memory Controller

Posted by EDA Geek News Staff in SIP on Tuesday, May 6, 2008

Virage Logic Corporation (NASDAQ:VIRL), the semiconductor industry's trusted IP partner and pioneer in Silicon Aware IP[tm], announced the selection of its Intelli[tm] Double Data Rate (DDR) Memory Controller interface solution by 3Leaf Systems, a provider of next-generation server virtualization solutions for enterprise data centers, to deliver a silicon proven, high-performance DDR memory controller IP solution.

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Innovision Research Debuts Gem NFC IP Evaluation, Licensing Programme

Posted by EDA Geek News Staff in SIP, Wireless on Wednesday, April 30, 2008

Innovision Research & Technology is making its unique Gem(tm) Near Field Communication (NFC) semiconductor intellectual property (IP) available under an evaluation licensing programme. This will enable semiconductor companies to develop NFC capability, either for stand-alone solutions or as part of System-on-Chip (SoC) integrated NFC solutions.

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CSR Selects Virage Logic Semiconductor IP for BlueCore, UniFi

Posted by EDA Geek News Staff in SIP, Wireless on Monday, April 28, 2008

Virage Logic Corporation (NASDAQ: VIRL), the semiconductor industry's trusted IP partner and pioneer in Silicon Aware IP(tm), announced that CSR of Cambridge, United Kingdom, a top global supplier of single chip wireless communications products, has licensed Virage Logic's semiconductor intellectual property (IP) to enable its next-generation technology. CSR will use Virage Logic's Area, Speed and Power (ASAP(tm)) Memory, Self-Test and Repair (STAR(tm)) Memory and STAR Yield Accelerator products for design of its BlueCore(tm) and UniFi(tm) product lines.

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TaraCom, GDA Team on GPON SerDes Phy IP, MAC for System Designs

Posted by EDA Geek News Staff in IP Cores, SIP on Thursday, March 20, 2008

TaraCom Integrated Products and GDA Technologies have entered into a partnership to combine their extensive experience in the mixed signal and digital technologies to offer an integrated solution for GPON applications for the ONU SerDes Phy and the GPON MAC that can be readily integrated into ASIC, SoC or other packaging formats in either 90 or 65 nm process technologies with multiple fabrication suppliers. Special Technical consultation is also available for integration with the laser drivers or system or optical modules.

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Arithmatica Grants Exclusive Read Channel IP License to Siglead

Posted by EDA Geek News Staff in SIP on Monday, January 21, 2008

Arithmatica, the datapath design company, announced that it has licensed its read channel intellectual property (IP) exclusively to Siglead, a Japanese startup that is developing semiconductors and IP for the hard disk drive industry. Siglead will acquire ownership of Arithmatica's read channel IP if certain performance milestones are achieved. The two principle engineering resources at Arithmatica that developed the read channel IP will join Siglead. The total value of the licensing is $1.7M.

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