'Models, Simulations' Category Archive

Agilent, NVIDIA Accelerate Signal Integrity Simulations with CUDA GPU

Posted by EDA Geek News Staff in Models, Simulations on Tuesday, August 26, 2008

Agilent Technologies Inc. (NYSE:A) announced its work with NVIDIA to accelerate signal integrity simulations using NVIDIA's Compute Unified Device Architecture (CUDA)-based Graphics Processing Units (GPU). The association is expected to yield the commercial release of a GPU-enabled Advanced Design System (ADS) Transient Convolution Simulator that will allow signal integrity designers to run these simulations dramatically faster than was previously possible.

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Tensilica Partner Program Gains CircuitSutra

Posted by EDA Geek News Staff in Design Services, Models, Simulations on Wednesday, August 20, 2008

Tensilica,® Inc. announced that CircuitSutra has joined its Xtensions[tm] partners network as a provider of SystemC consulting services. CircuitSutra offers comprehensive SystemC services including TLM modeling of complete SOC (System on Chip) and individual IP (intellectual property) blocks at various abstraction levels, and in the creation of virtual platforms for embedded software development and architectural exploration.

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Agilent Introduces 3D EM Simulation Solution for RF Module Design

Posted by EDA Geek News Staff in Models, Simulations on Monday, August 18, 2008

Agilent Technologies Inc. (NYSE:A) announced an integrated design flow solution that includes full 3D EM simulation for RF Module Design. Called EMDS-for-ADS, the full 3D electromagnetic (EM) simulator is integrated into Agilent's Advanced Design System EDA software platform and eliminates the need for standalone EM tools. EMDS-for-ADS helps designers accurately predict the 3D EM interactions of embedded passive components in RF modules while co-simulating with active circuits to maximize the wireless sub-system performance. The integrated 3D EM simulator improvements allow designers to analyze larger circuits faster without leaving their familiar design flow. This capability increases productivity in the overall design and verification process.

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Imperas to Create Free Models of MIPS Processor Cores

Posted by EDA Geek News Staff in IP Cores, Models, Simulations on Monday, August 18, 2008

Imperas announced it has signed an agreement with MIPS Technologies, Inc. (NasdaqGS: MIPS), a leading provider of industry-standard architectures, processors and analog IP for digital consumer, home networking, wireless, communications and business applications, for the verification of a series of processor models that Imperas will create and make freely available.

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CoWare Debuts MIPS Instruction Set Simulators for MIPS32 Cores

Posted by EDA Geek News Staff in Models, Simulations on Monday, August 18, 2008

CoWare®, Inc., the leading supplier of platform-driven electronic system-level (ESL) design software and services, and MIPS Technologies, Inc. (Nasdaq:MIPS), a leading provider of industry-standard architectures, processors and analog IP for digital consumer, home networking, wireless, communications and business applications, announced a partnership to deliver ultra high-speed MIPS-Verified[tm] Instruction Set Simulators (ISS) of MIPS32® cores. These models, developed with CoWare Processor Designer technology, will be verified by MIPS Technologies to achieve the MIPS-Verified label, and will be distributed by CoWare as part of its comprehensive ESL 2.0 design environment including CoWare Virtual Platform. The first available ISS is for the low-power, high-performance MIPS32® 24K® core.

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EMCoS, Dolphin Integration Team on VHDL-AMS for EMC, Signal Integrity

Posted by EDA Geek News Staff in Models, Simulations on Monday, August 18, 2008

EMCoS, a leading provider of simulation software for electromagnetic problems and data visualization, and DOLPHIN Integration, creator of the multi-domain and multi-level simulator SMASH with its renowned VHDL-AMS compliance, announce their solution for EMC and Signal Integrity simulation in automotive electronics applications.

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