MIPS, Open-Silicon, Dolphin Tapeout ASIC CPU at 2.4GHz and Beyond
Open-Silicon, Inc., MIPS Technologies, Inc. (NASDAQ: MIPS), and Dolphin Technology announced the successful tapeout of a high-performance ASIC processor at over 2.4GHz under typical conditions. This achievement, as measured in timing closure against TSMC reference flow signoff conditions, will make this one of the highest frequency ASIC processors ever built, highlighting the companies’ industry-leading technologies for building high-performance processor-based systems. This high-performance ASIC processor is a follow-on test chip to the 65nm, 1.1GHz test chip announced by Open-Silicon and MIPS Technologies at the end of last year.
Synopsys DesignWare SATA IP Passes SATA-IO Interoperability Testing
Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, announced that Synopsys’ DesignWare® Serial Advanced Technology Attachment (SATA) IP solution has successfully passed the SATA International Organization (SATA-IO) electrical, digital and system interoperability testing for 130- to 40-nanometer (nm) process technologies. The SATA-IO interoperability testing validates Synopsys’ internal testing of the DesignWare SATA IP, which includes extensive digital and mixed-signal simulation validation, hardware FPGA-based prototyping using Synopsys’ HAPS® solution, and PHY test chip silicon characterization.
Synopsys Introduces DesignWare MIPI M-PHY IP
Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, announced immediate availability of the DesignWare® MIPI M-PHY® IP for next-generation high-speed interfaces based on the newly ratified MIPI® Alliance M-PHY specification. With this latest addition to the DesignWare MIPI IP portfolio, Synopsys is the first provider to offer a comprehensive solution of a controller and PHY IP for both the MIPI DigRF(SM) v3 (2.5G/3.0G) and v4 (4G) standards. Incorporating both standards in a mobile device brings the benefit of the faster 4G standards while preserving broad coverage by using 2.5G/3.0G as a fallback mode. The configurable MIPI DigRF V4 Master Controller and M-PHY hard macro are compliant to the MIPI Alliance specifications. Utilizing a single-vendor solution enables designers to lower the risk and cost of integrating these MIPI interfaces into baseband and application processor integrated circuits (ICs), speeding time-to-market of advanced semiconductor solutions for LTE and Mobile WiMAX.
OCP-IP, CircuitSutra, Imperas Announce Virtual Platform Demo
Open Core Protocol International Partnership (OCP-IP), the organization delivering a common standard for intellectual property core interfaces that facilitate “plug and play” SoC design, and CircuitSutra, experts in SystemC modeling and embedded software development, along with Imperas, the company providing the infrastructure for the future of software virtual platforms and enabling the next generation of embedded software development, announced the availability of a Virtual Platform Demo created utilizing OCP-IP’s advanced Modeling Kit. This example platform acts as a guide to OCP-IP members enabling them to quick-start their ESL activities using the OCP-IP TLM Modeling Kit; which is fully compatible with OSCI’s TLM 2.0.1. Both the kit and Virtual Platform examples are free to both OCP-IP members and non-members.
Synopsys Creates DesignWare USB Software Alliance Program
Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design and manufacturing, announced the launch of the DesignWare® USB Software Alliance Program with leading USB software providers emsys, Jungo, MCCI and MicroDigital as inaugural members. This alliance program establishes an ecosystem of qualified USB software providers for drivers, firmware and stacks which have proven interoperability with Synopsys’ DesignWare USB 2.0 and SuperSpeed USB 3.0 IP. Synopsys and its DesignWare USB Software Alliance Program members can help designers to quickly incorporate USB connectivity into their system-on-chips (SoCs) with less risk and provide consumers with the plug-and-play functionality required for PCs, peripherals, mobile devices and consumer electronic products.
GLOBALFOUNDRIES, Synopsys Team on DesignWare Interface PHY IP for 28nm
Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, and GLOBALFOUNDRIES, a leading provider of advanced semiconductor technology and manufacturing services, announced an agreement to develop the Synopsys DesignWare® SuperSpeed USB (3.0), USB 2.0, HDMI 1.4 Tx and Rx, DDR3/2, PCI Express® 2.0 and 1.1, SATA 1.5/3 Gbps and 6 Gbps, and XAUI PHY IP for GLOBALFOUNDRIES’ 28-nanometer (nm) “Gate First” High-k Metal Gate (HKMG) process technologies. The collaboration will enable mutual customers to differentiate their 28nm designs with a high-quality IP portfolio targeted at next-generation electronic system-on-chips (SoCs). The long-standing relationship between the two companies has resulted in the successful development of DesignWare PHY IP from 180-nm to 32-nm process technologies. GLOBALFOUNDRIES and Synopsys are the first to announce the development of USB, PCI Express, DDR, HDMI, SATA and XAUI PHY IP targeting 28-nm process technologies with scalability to future generations.
EnSilica Offers Special Licensing to Switch to eSi-1600 Processor
EnSilica, a leading independent provider of front-end IC design services, has announced a special licensing deal to encourage existing 8051 licensees to switch their next ASIC design start to an eSi-1600 16-bit soft processor core. For all enquiries received before January 31, 2011 and subject to Terms and Conditions, EnSilica is offering to match their 8051 license fee.
Synopsys Announces DesignWare Hi-Fi Audio IP for 40nm, 55nm Process
Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, announced the addition of the DesignWare® 96 dB Hi-Fi Audio IP in the 40-nanometer (nm) and 55-nm process technologies to its broad portfolio of high-quality audio IP solutions. Synopsys is the first IP provider to offer audio codecs, digital-to-analog converters (DACs) and analog-to-digital converters (ADCs) in these advanced processes. The DesignWare Audio IP portfolio offers performance levels from 80 dB to 103 dB and is available in more than 20 different process nodes, from 180-nm to 60-nm, and now down to 40-nm. The IP is targeted for consumer electronic applications requiring Hi-Fi playback and record capabilities with very low power consumption and small silicon area, such as portable media players, mobile phones, smart phones, CD/DVD/Blu-ray players/recorders and digital cameras.
CSR Acquires APT Licensing, apt-X Audio Compression Technology
CSR plc (CSR) announced the acquisition of Belfast-based APT Licensing Ltd, (APT), following a successful three year collaboration under the CSR eXtension Partner Programme, which saw APT’s professional quality audio compression brought to consumers on CSR’s wireless audio platforms. The acquisition enables a tighter integration of the apt-x low latency audio compression CODECs with CSR’s next generation audio products. The acquisition also enables CSR to substantially strengthen its offering in the growing real-time streaming audio market for mobile and wireless consumer applications and support its expansion into broader audio markets.
Cadence, ARM Optimize System Realization Solution for Processors
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, announced a broadening of its existing collaboration with ARM to develop an optimized System Realization solution for ARM processors that will enable an end-to-end flow including a full set of interoperable tools, ARM® processor and physical IP, services and methodology from embedded Linux to GDSII. To accelerate adoption of this solution, Cadence will provide a full complement of tutorials and education materials including two methodology reference books and extend their ecosystem of service, methodology and training providers.
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