Actel Introduces Fusion Embedded Development Kit
Continuing to demonstrate the integration benefits that mixed-signal FPGAs offer, Actel Corporation (Nasdaq: ACTL) announced the Fusion Embedded Development Kit, enabling system designers to quickly and cost effectively prototype a full system-on-a-chip design. The kit features the Actel Fusion® mixed-signal FPGA, the only one of its kind in the industry, and supports a variety of processors, including license-free versions of the ARM® Cortex(TM)-M1 and Core8051.
MSC Vertriebs Unveils Hpe_IRP Reference Design for Industrial Automation
MSC Vertriebs GmbH announced the modular and flexible reference design platform Hpe®_IRP for industrial automation applications based on the Intel® Atom[tm] processor and Altera Arria GX FPGA. This platform has been developed using technologies from Gleichmann Electronics Research GmbH & Co KG, Intel Corporation, Altera Corporation and 3S-Smart Software Solutions GmbH. The development kit provides designers with a solution for immediately starting designs enabling field bus and real-time Ethernet connectivity in an industrial run-time environment. Target markets for the reference platform are industrial automation applications such as programmable logic controllers (PLCs), human machine interfaces (HMIs), panel PCs, and industrial drives.
Lattice Semiconductor Unveils Programmable PCI Express-to-HSS Bridge
Lattice Semiconductor Corporation (NASDAQ: LSCC) announced the availability of a low cost programmable PCI Express-to-High Speed Serial (HSS) bridge for the CAP12-120, a Small Office Home Office (SOHO) Voice Over IP (VOIP) platform running on Intel® architecture. This bridge design has been implemented in the award-winning LatticeECP2M[tm] FPGA. The solution utilizes the LatticeECP2M’s low power, high-performance SERDES and a Lattice PCI Express Intellectual Property (IP) core.
Xilinx to Demonstrate, Present at Embedded World 2009
Xilinx, Inc. (Nasdaq: XLNX) announced its participation at Embedded World 2009 in Nuremberg, Germany from March 3 through 5. The company will demonstrate and present advanced embedded processing technologies that deliver enhanced system-level performance, design flexibility, and increased productivity for a broad range of applications in areas such as industrial automation, automotive driver assistance, and infotainment.
Sundance Unveils SMT712 Dual DAC PXI Express Hybrid Peripheral Module
Sundance, the leading supplier and manufacturer of advanced digital signal processing (DSP) and reconfigurable FPGA solutions, announced the expansion of its multiprocessor PXI Express offering with the immediate availability of its SMT712 Dual DAC PXI Express Hybrid Peripheral Module. The SMT712 module is a dividend of the Sundance PXI product development roadmap that was announced in October 2008. It demonstrates the Company’s ongoing commitment and investment in the PXI open specification and brings extreme FPGA acceleration to PXI Express systems.
Lattice Launches PAC-Designer 5.0 Mixed Signal Design Tool Suite
Lattice Semiconductor (NASDAQ: LSCC) announced Version 5.0 of its PAC-Designer® mixed signal design tool suite with new device support and improved quality of results. The PAC-Designer 5.0 software now supports the new ispClock[tm]5400D family of in-system programmable ICs, which are ideal for applications that require low-cost SERDES clock references and distributing high speed differential clocks.
Lattice Debuts Service Pack 1 for ispLEVER v7.2 FPGA Design Tool Suite
Lattice Semiconductor Corporation (NASDAQ: LSCC) announced the immediate availability of Service Pack 1 for Version 7.2 of its ispLEVER® FPGA design tool suite. The release adds support for the new LatticeECP3[tm] FPGA family and the latest release of Synopsys’ Synplify Pro® advanced FPGA synthesis for all operating systems supported and Aldec’s Active-HDL[tm] Lattice Edition simulator for Windows.
Lattice Rolls Out ispClock 5400D Differential Clock Distribution ICs
Lattice Semiconductor Corporation (NASDAQ: LSCC) announced its ispClock[tm]5400D family of differential clock distribution ICs, featuring the CleanClock[tm] ultra-low phase noise PLL. The ispClock5400D family contains the six-output ispClock5406D and ten-output ispClock5410D. The FlexiClock[tm] output section of the ispClock5400D devices supports multiple logic standards and dual skew control features. The configuration of each device is held in on-chip non-volatile memory that is reprogrammable through a JTAG interface. Certain aspects of the device can be modified on the fly via an I2C interface. Design for the devices is supported in the Lattice PAC- Designer® software tool.
Lattice Introduces MachXO Mini Development Kit, Reference Designs
Lattice Semiconductor Corporation (NASDAQ: LSCC) announced the immediate availability of fifteen new reference designs and a new $59 development kit referred to as the MachXOTM Mini Development Kit, which are ideal for prototyping high volume, cost sensitive low density applications. The instant-on, easy to use MachXO programmable logic device (PLD) family offers users the benefits of increased system integration by providing embedded memory, built-in PLLs, high performance LVDS I/O, remote field upgrade (TransFRTM technology) and a low power sleep mode, all in a single device. Designed for a broad range of low density applications that include general purpose I/O expansion, control, bus bridging and power-up management functions, the popular MachXO PLD family is used in a variety of end markets such as consumer, automotive, communications, computing, industrial and medical. In fact, shipments of the MachXO PLD family recently surpassed 15 million units in just over three years.
Lattice Semiconductor Announces 65nm LatticeECP3 FPGA Family
Lattice Semiconductor Corporation (NASDAQ: LSCC) announced its third generation high value FPGAs, the mid-range 65nm LatticeECP3[tm] family, which offers the industry’s lowest power consumption and price of any SERDES-capable FPGA device. The LatticeECP3 FPGA family offers multi-protocol 3.2G SERDES with XAUI jitter compliance, DDR3 memory interfaces, powerful DSP capabilities, high density on-chip memory and up to 149K LUTS, all with half the power consumption and half the price of competitive SERDES-capable FPGAs. The entire LatticeECP3 family is manufactured using Fujitsu’s advanced low power process technology, and is the only 65nm mid-range, high value FPGA family in the industry.
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