EDA News - electronic design automation, semiconductor

Share/BookmarkSubscribe
'FPGAs' Category Archive

Vanguard Software Solutions Becomes Member of Xilinx Alliance Program

Posted by Ken Cheung in FPGAs,IP Cores on Tuesday, November 17, 2009

Vanguard Software Solutions, Inc. (VSOFTS), a recognized leader in development of video coding products and technologies, has joined the Xilinx Alliance Program as a supplier of AVC Encoder IP Core solutions. As of the date of this press release, VSOFTS has made available its highly flexible AVC-Intra Encoders and CABAC Encoder/Decoder IP Cores for Xilinx® Virtex® FPGA and Spartan® FPGA-based solutions to Xilinx FPGA customers. These IP Cores are optimized for the Virtex architecture, and designed to provide the highest level Broadcast quality compression in a compact, low power design.

Read more »

Xilinx Simplifies Power Design with TI Digital Power Management

Posted by Ken Cheung in FPGAs,Microcontrollers on Monday, August 31, 2009

Texas Instruments (TI) (NYSE: TXN) announced Xilinx is using TI power management technology to simplify power design in its new Virtex(R)-6 ML605 field programmable gate array (FPGA) evaluation kit. TI’s Fusion Digital Power(TM) controllers give FPGA users advanced power management capability and design flexibility, including the ability to monitor a power system’s behavior in real time.

Read more »

EDA/SOPC Lab Opens at Peking University School of Software and Microelectronics

Posted by Ken Cheung in Events, Training,FPGAs on Tuesday, August 11, 2009

Altera Corporation (NASDAQ:ALTR) announced the opening of the new Peking University and Altera International Limited Joint EDA/SOPC Lab at the Peking University School of Software and Microelectronics (Wuxi), Jiangsu Province, China. This is the 66th Joint Lab and Training Center (JLTC) that Altera has established with major universities in China. As part of Altera’s worldwide University Program, the JLTCs are equipped with the latest Altera® Quartus® II design software and a set of Altera DE2-70 development kits to aid professors in conducting hands-on training with students.

Read more »

Xilinx Virtex-5 FPGA Powers Vulcan SP HT6210 Network Interface Card

Posted by Ken Cheung in FPGAs,Networking on Friday, July 31, 2009

Commex Technologies Ltd., a provider of intelligent, high-performance data-routing solutions for x86 multicore systems, revealed that its Vulcan SP HT6210 Network Interface Card (NIC) has achieved data throughput of 27 Gbps. The Commex NIC accomplishes this unparalleled bandwidth by maximizing the performance of its onboard Xilinx® Virtex®-5 FPGA, and by leveraging the board’s 16-lane, 1.2Gtps HyperTransport bus interface.

Read more »

Icera Espresso 300 3G Soft Modem Features QuickLogic ArcticLink CSSP

Posted by Ken Cheung in FPGAs,Wireless on Thursday, July 30, 2009

QuickLogic Corporation (NASDAQ: QUIK), the lowest power programmable solutions leader, announced the selection of its Customer Specific Standard Product (CSSP), based on the ArcticLink solution platform, for the Icera Espresso® 300 3G soft modem platform, that is now entering production. Icera is a leader in software-defined wireless chipsets and is the only company to deliver software-based cellular modems for broadband data cards, USB sticks, and mobile internet devices. Icera’s reference design uses a wafer-level chip scale (WLCSP) version of the ArcticLink solution platform to compliment its second-generation baseband chip design. QuickLogic provides higher speed, smart data transfers between USB and SD/SDHC memory via QuickLogic’s innovative Smart Programmable Integrated Data Aggregator (SPIDA) system block.

Read more »

Cadence, Xilinx Team on Verification for FPGA Targeted Design Platforms

Posted by Ken Cheung in EDA Tools,FPGAs on Wednesday, June 24, 2009

Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic design innovation, announced that it has teamed with Xilinx to enable delivery of encrypted simulation models of Xilinx intellectual property (IP) in the latest 11.2 release of the Xilinx ISE Design Suite. The result is an expanded library of design IP and complementary simulation models supported by the Cadence® Incisive® functional verification platform for the new Xilinx Base Targeted Design Platform. Used in conjunction with the Open Verification Methodology (OVM) to provide multi-language verification and reuse, this approach can help mutual customers reduce risk and boost schedule predictability and quality.

Read more »

Actel Cup China Students FPGA Design Competition Winners

Posted by Ken Cheung in Events, Training,FPGAs on Wednesday, May 27, 2009

Actel Corporation (Nasdaq: ACTL), the leader in low-power and mixed-signal FPGAs, announced the winners of its 2009 Actel Cup China Students FPGA design competition. Chosen from more than 300 submissions by students from 190 universities, designs from Xian University of Electronic Science and Technology and South China Agricultural University were tied for first place, meeting the contest’s very high standards for creativity, including three key qualifications: high level of innovation, immediate market viability and easy system implementation. This year’s competition was co-sponsored with Guangzhou ZLGMCU Development Company (ZLGMC).

Read more »

Achronix Announces Encryption Standard IP Cores for Speedster

Posted by Ken Cheung in FPGAs,IP Cores on Wednesday, May 6, 2009

Achronix Semiconductor, maker of the world’s fastest field-programmable gate arrays (FPGAs), announced the availability of new, high-performance Advanced Encryption Standard (AES) IP cores for its Speedster[TM] 1.5 GHz family. These high-performance 128-bit key size AES cores, from Portland, Ore.-based Signali Corp., are targeted at 10 Gbps, 40 Gbps, and 100 Gbps applications. They demonstrate the speed of the Speedster FGPA fabric, as well as the balance between throughput performance and resource minimization achieved by the Signali Cores.

Read more »

Tokyo Electron Device Unveils inrevium TB-5V-SX95T4-HSC FPGA Platform

Posted by Ken Cheung in FPGAs on Wednesday, March 18, 2009

Tokyo Electron Device Limited (TED) has announced the release of Quad Virtex-5 FPGA High-Speed Computing Platform. The inrevium TB-5V-SX95T4-HSC features four Xilinx Virtex-5 SX95T FPGAs and can realize high-speed and more complex processing (multiple data parallel processing).

Read more »

Actel Debuts SoftConsole 2.2 Embedded Software Development Environment

Posted by Ken Cheung in EDA Tools,FPGAs on Monday, March 16, 2009

Actel Corporation (Nasdaq: ACTL) announced the availability of SoftConsole version 2.2, the next-generation free development environment for embedded design. This new version includes enhanced capabilities for debug and the downloading of programs, including a new flash loader, and support for the Microsoft® Vista operating system. Leveraging Actel’s IGLOO® low-power FPGAs and Actel Fusion® mixed-signal FPGAs, SoftConsole is a single programming environment that enables software engineers to write and debug C and C++ programs targeted at Actel’s portfolio of embedded processors, including ARM® Cortex[tm] -M1 and Core8051s.

Read more »

« Newer Posts || Older Posts »

Custom Search

EDA Geek Newsletter
Don't have time to visit EDA Geek everyday? Then sign up for our free newsletter. We'll send you an email when we have something to share with you. Your email address will be kept confidential and we will not share, sell, or rent it to anyone. You can unsubscribe at any time by clicking a link in the email.

Enter your email address to sign up for our free newsletter:  

If you are familiar with RSS feeds, you can also sign up for our free news feed. Our RSS feed is updated in real-time while our newsletter is updated daily.