Intel, Samsung, TSMC Agree on 450mm Wafer Manufacturing Transition
Intel Corporation, Samsung Electronics and TSMC announced they have reached agreement on the need for industry-wide collaboration to target a transition to larger, 450mm-sized wafers starting in 2012. The transition to larger wafers will enable continued growth of the semiconductor industry and helps maintain a reasonable cost structure for future integrated circuit manufacturing and applications. The companies will cooperate with the semiconductor industry to help ensure that all of the required components, infrastructure and capability are developed and tested for a pilot line by this target date.
Mentor, UMC Validate Calibre nmDRC Physical Verification 65nm Deck
Mentor Graphics Corporation (Nasdaq: MENT) announced that it has worked with leading foundry UMC to validate the accuracy of UMC's 65nm physical verification flows using the Calibre nmDRC product. Using one of UMC's advanced 65nm customer products as the test design, the cooperative effort verified that UMC's 65nm Calibre production decks accurately reflect the design rule manual for this node, providing UMC customers with even greater confidence in the manufacturability of their 65nm chip designs.
SMIC, Amlogic Team on 90nm Digital Photo Frame Chip
Semiconductor Manufacturing International Corporation ("SMIC"; NYSE: SMI; SEHK: 0981.HK) and Amlogic Inc. jointly announced the successful commercial production of a 90nm digital photo frame (DPF) chip designed by Amlogic and manufactured at SMIC. The chip, used in the fast-growing digital photo frame market, is the most integrated multimedia SOC on the market. It supports multiple video and photo format decoding and integrated numerous advanced peripherals like high-speed USB and LCD controls. Due to the high integration of this chipset, DPF can perform more complex functions and the overall platform cost can be reduced, thus enabling more consumers to own their personal digital photo frame.
SMIC, ASTRI Team on Dual Mode UWB MAC ASIC
Semiconductor Manufacturing International Corporation (SMIC — NYSE: SMI; SEHK: 0981.HK), one of the leading semiconductor foundries in the world, and the Hong Kong Applied Science and Technology Research Institute (ASTRI) jointly announced their partnership to provide the world's first dual mode UWB MAC IC using SMIC's 0.13um mix-mode CMOS technology. SMIC's RF group provides design supports and mixed-signal RFIC open lab services in Shanghai to advance mixed-signal RFIC development on 0.18um, 0.13um, and more advanced technologies. ASTRI and SMIC share the goal of offering wideband IPs to foster the development of advanced wireless RFICs in China.
IBM Chip Alliance Makes Breakthrough with High-K Metal Gate Gate Material
IBM (NYSE: IBM) and its joint development partners – Chartered Semiconductor Manufacturing Ltd. (Chartered), Freescale Inc. , Infineon Technologies AG, Samsung Electronics Co., Ltd. (Samsung), STMicroelectronics N.V. and Toshiba Corporation – announced that they have collectively demonstrated significant performance and power consumption advantages over industry standards by using a breakthrough material known as "high-k/metal gate" (HKMG) on silicon manufactured at IBM's state-of-art 300 millimeter (mm) semiconductor fabrication facility in East Fishkill, N.Y. With this achievement the joint development partners are now ready for early customer engagements. Clients may now design in this leading edge, low power foundry technology in order to help speed time-to-market and help realize power-performance advantage for their products.
TSMC, Blaze DFM Team on Power Trim Service
Taiwan Semiconductor Manufacturing Company, Ltd. (TSE: 2330, NYSE: TSM) announced that it has signed an exclusive agreement with Blaze DFM, Inc. to offer Power Trim Service, a new service offering combining a patented Blaze power optimization technology with special variations of TSMC's advanced manufacturing process. Under the terms of the agreement, TSMC will make available to its customers the Power Trim Service which provides significant leakage power reduction while maintaining chip performance and area. In addition to delivering substantial reductions in leakage power above and beyond existing techniques already employed in the chip, the Power Trim Service also significantly reduces leakage power variability, a critical power issue to overcome in next generation system-on-chip (SoC) designs.
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