'Events, Training' Category Archive

Cypress Announces PSoC Innovator Design Challenge India

Posted by EDA Geek News Staff in Events, Training on Thursday, August 21, 2008

Cypress Semiconductor Corp. (NYSE:CY) announced the PSoC® Innovator Design Challenge India, a multi-discipline design contest open to engineering students in India. Recognizing the growth of engineering talent in India, the Design Challenge will require students to stretch their imaginations to develop novel ways to utilize Cypress's PSoC technology. PSoC, a Programmable System on Chip, allows designers to customize microcontroller chips using visual design software on their PCs.

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Unicoi Systems Demonstrates Fusion Reference Designs at Nvidia NVISION

Posted by EDA Geek News Staff in Events, Training, Reference Design on Thursday, August 21, 2008

Unicoi Systems, a long-time provider of software solutions to the embedded device market, will be demonstrating their latest reference designs for automotive and consumer electronics OEMs at Nvidia's NVISION 08. Unicoi, a Windows® Embedded Partner, is planning to present a state-of-the-art, in-vehicle media platform which continues to grow in popularity among OEM vendors in U.S. and international automotive markets.

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Sequence Announces Design for Power Seminar in Bangalore

Posted by EDA Geek News Staff in Events, Training on Wednesday, August 20, 2008

Sequence Design, the EDA leader in Design for Power (DFP)[tm] solutions, hosts its third annual low-power System-on-Chip (SoC) design Seminar in Bangalore on Wednesday, Sept. 10 beginning at 9am. Notable speakers from business and academia will highlight the day's events - followed by a luncheon. The seminar will be held at the Hotel Leela Palace, Bangalore.

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SEMICON Taiwan 2008 Features SEMATECH President, CEO

Posted by EDA Geek News Staff in Events, Training on Wednesday, August 20, 2008

SEMATECH announced that President and Chief Executive Officer Dr. Michael R. Polcari will be a featured guest speaker and panelist of the CEO Forum at SEMICON Taiwan 2008, taking place September 9-11, 2008 in Taipei, Taiwan. Dr. Polcari, veteran technologist, will deliver a presentation entitled "Maximizing Productivity from Lab to Fab" on Tuesday, September 9 at 2:20 p.m. at Taipei International Convention Center (TICC), Taipei. He will outline a broad range of innovative productivity enhancements being developed in research labs and manufacturing fabs, based on the work being done at SEMATECH in cooperation with its global members and partners, and their potential impact on the industry's overall profitability and sustainability.

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Tensilica Offers Webcast on AMP, SMP MPSOC Architectures

Posted by EDA Geek News Staff in Events, Training on Tuesday, August 19, 2008

Tensilica, Inc. will present a live webcast, "Understanding AMP and SMP MPSOC Architectures for Multimedia and Networking Applications," highlighting the two main forces driving MPSOC (multiple processor system on chip) development. The seminar will provide a framework for understanding the strategies that come into play when trying to meet the diverse needs of such systems with MPSOC architectures and selecting the right MPSOC architectures for specific applications.

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Synopsys to Demonstrate DesignWare IP Solutions at Intel Developer Forum

Posted by EDA Geek News Staff in Events, Training on Thursday, August 14, 2008

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, will be demonstrating its complete DesignWare® IP solutions for PCI Express®, USB and SATA at the Intel Developer Forum (IDF) in San Francisco, California on August 19, 2008. Furthermore, the DesignWare IP for PCI Express with PCI-SIG I/O Virtualization technology will be featured in the Intel Lab sessions at IDF.

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