Actel to Attend FPGA Summit 2008
Actel Corporation (Nasdaq: ACTL), the leader in low-power and mixed-signal FPGAs, will participate at the FPGA summit. The FPGA Summit focuses on the use of FPGAs and issues such as efficient design, fast development time, and faster verification. Actel will present the advantages of design techniques and power efficiency in product development at this event.
SEMATECH to Present at IEEE International Electron Devices Meeting
Demonstrating its leadership in developing alternative transistor materials and processes for next-generation logic and memory technologies, SEMATECH engineers will present five technical papers at the 54th annual IEEE International Electron Devices Meeting (IEDM), the world’s premier forum for the presentation of applied research in microelectronic, nanoelectronic and bioelectronic devices, on December 15-17, 2008 at the Hilton in San Francisco, CA.
Live EDGE EcoSphere Features Cree XLamp LEDs
Committed to bringing electronic engineers the newest technologies first, leading multi-channel electronics distributor Newark, part of the global Premier Farnell Group, announces that Cree will be one of 31 top suppliers featured at the “Energy Efficiency & Lighting” global technical learning and networking event, held virtually at the Live EDGE EcoSphere on December 11, 2008 from 8am to midnight EST. Engineers and engineering students are invited learn about the same Cree technologies that were showcased at the Beijing Games at the online event.
Agilent to Present SystemVue at FPGA Summit
Agilent Technologies Inc. (NYSE:A) announced that the company will participate in two seminar sessions here at the inaugural FPGA Summit. The event focuses on the design and use of FPGAs (field-programmable gate arrays). FPGAs offer flexible, rapid deployment of very high performance communications physical layer (PHY) architectures, such as those found in Software-Defined Radios (SDR). While the speed and reconfigurability of FPGAs have enabled new applications for signal processing, the complexity of SDR system architectures creates additional design challenges. At FPGA Summit, Agilent will present a fresh approach to these challenges, enabled by a new electronic system-level (ESL) design environment called SystemVue 2008.
Synfora Announces Seminar for SoC, FPGA Developers
Synfora Inc., the premier provider of algorithmic synthesis tools used to design SoCs and FPGAs, will conduct a seminar on the morning of Tuesday, December 9, 2008, to show SoC and FPGA developers of video IP how to reduce design and verification time while being able to explore alternative implementations that will let them decrease silicon area and power consumption.
Design, Automation and Test in Europe 2009
Industry and academia who want to connect with the latest developments in the electronics industry are advised to attend DATE (Design, Automation and Test in Europe) 2009 and consider sponsorship. With just four months to go until DATE09, a leading global electronics event, which will be held in Nice, France from 20-24 April, the conference has received a record number of contributor submissions and a 30 percent increase in papers on industrial applications.
Denali, Samsung Announce Toggle-Mode DDR NAND Flash Webinars
Samsung Semiconductor, Inc., the world leader in advanced memory technology, and Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), have each developed an informative webinar, providing valuable insights into the new Toggle-mode DDR NAND Flash technology, including information on Toggle-mode NAND design, estimated market entry and standardization efforts.
Cypress Reveals Best Practices for Capacitive Touch-Sensing Design
Cypress Semiconductor Corp. (NYSE:CY) announced a free, online seminar that gives a detailed overview of designing capacitive touch-sensing interfaces. The 60-minute webcast entitled “Capacitive Touch-Sensing Design Best Practices” will be presented in conjunction with EDN.com on Wednesday, December 10 at 9:00 a.m. PST.
Synfora Announces Seminar for SoC, FPGA Developers
Synfora Inc., the premier provider of algorithmic synthesis tools used to design SoCs and FPGAs, will conduct a seminar on the morning of Tuesday, December 9, 2008, to show SoC and FPGA developers of video IP how to reduce design and verification time while being able to explore alternative implementations that will let them decrease silicon area and power consumption.
Achronix Semiconductor to Demonstrate 10.3 Gbps SerDes at FPGA Summit
Achronix Semiconductor will demonstrate its Speedster FPGA’s 10.3 Gbps embedded serial-deserializer (SerDes) capability, a key element of its 1.5 GHz FPGAs. The demonstration will be at the inaugural FPGA Summit, Tuesday through Thursday Dec. 9-11, at the Wyndham Hotel in San Jose, Calif. A video of the SerDes demonstration will be posted after Dec. 11.
« Newer Posts || Older Posts »
If you are familiar with RSS feeds, you can also sign up for our free news feed. Our RSS feed is updated in real-time while our newsletter is updated daily.