DSM Somos Announces TetraShell Hollow build Software for Prototyping
DSM Somos®, a world leader in the development of advanced stereolithography (SL) materials for rapid prototyping and manufacturing, has announced that it will introduce a new software application allowing SL users to create light-weight prototypes having enhanced structural integrity. Based on patented technology from the Milwaukee School of Engineering (MSOE), TetraShell[tm] hollow build software will use MSOE's TetraLattice technology to facilitate the manufacture of hollow stereolithography parts with variable skin thicknesses, supported by a patented and proprietary TetraLattice[tm] support structure. Potential application areas include investment casting patterns, reduced- density metal clad composite structures and light-weight large, thick-sectioned parts.
embWiSe Ports Linux SDIOWorx to Freescale's iMX31, iMX27 Platforms
embWiSe Technologies Pvt.Ltd. a start-up in Chennai, India had announced support for its Linux SDIOWorx package on Freescale Semiconductors' iMX31 and iMX27 Host Processor platforms. Riding on the success of its complete Linux SDIOWorx package, embWiSe had developed and ported its Linux version of SDIOWorx package on Freescale's iMX31 and iMX27 Processor Platforms under Linux 2.6.x kernels. The iMX31 and iMX27 application processors from Freescale Semiconductors are targeted for multimedia applications like the fast growing PMP/ Video Surveillance Camera and Portable Navigation Devices market.
GateRocket Introduces RocketDrive for Xilinx Virtex-5 FPGAs
GateRocket® Inc. announced availability of its RocketDrive® for Virtex®-5 FPGAs from Xilinx. The RocketDrive cuts verification and in-system debug time for advanced single or multi-FPGA based projects while adding significant value through seamless integration to a design team's existing design verification environment, without a change in design flow or verification methodology.
TRANGO Hypervisor for TI OMAP 2430 SoC Becomes CSPN Compliant
TRANGO Virtual Processors, the leading provider of embedded virtualization IP, announced that the TRANGO Hypervisor for the Texas Instruments OMAP 2430 System on Chip (SoC) is compliant with the CSPN (First Level Security Certification) criteria, established by the French National Security Agency (DCSSI, Central Directorate for Information Systems Security).
Synopsys IC Compiler 2008.09 Features 2X Speed-Up
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, announced the availability of IC Compiler 2008.09, delivering a dramatic boost in IC designer productivity. The latest release features faster runtimes across the board, leading to a 2X to 3X speed-up in overall turnaround time. This release also introduces new technology that speeds design closure including improved timing, variation-aware clock-tree synthesis, lower power, enhanced DFM, and signoff-quality incremental design-rule checking. With this release, the recently-announced Zroute technology delivering a 10-fold speed-up in routing is now available as a standard feature to all IC Compiler customers.
Aldec Introduces Active-HDL 8.1 for FPGA Designs
Aldec, Inc., a pioneer in mixed-language simulation for ASIC and FPGA devices, announced the release of Active-HDL 8.1. The new release introduces a first-to-market FPGA simulator supporting assertions and functional coverage in SVA, PSL and OVA at an affordable price. Other improvements in this release include Verilog® simulation performance speed-up and support for additional VHDL 2008 language constructs. Active-HDL is a mixed-language HDL simulator that offers project management, graphical design creation and support for all leading FPGA vendors from a single integrated design environment.
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