Synopsys Invests In Prover Technology - Signaling Design Automation
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, and Prover Technology AB announced that Synopsys has invested in Prover, which supplies signaling design automation solutions for engineering the safety critical systems that control trains, switches and signals. The funds will enable Prover to accelerate its research and development efforts and expand its operations in Europe, North America and Asia.
Lattice Semiconductor Announces ispLEVER 7.1 FPGA Design Tool Suite
Lattice Semiconductor Corporation (NASDAQ: LSCC) announced the immediate availability of its ispLEVER 7.1 FPGA design tool suite. The new tool release delivers a number of new functional and performance-enhancing features, including the industry's first dedicated FPGA Simultaneous Switching Output (SSO) Analyzer. The SSO Analyzer enables FPGA designers to actively analyze and optimize I/O pin placement and output switching characteristics to minimize undesirable noise and ground bounce on a printed circuit board. To enable designers to achieve higher levels of productivity, the ispLEVER 7.1 design tools also deliver up to 30% faster FPGA design compile times and now support multi-processor powered design compilation to achieve the fastest timing closure.
MindTree Offers CPF Flow, Joins Power Forward Initiative
MindTree Ltd., a global IT and R&D Services Company, and the Power Forward Initiative (PFI) announced that MindTree has joined the Power Forward Initiative and will be offering a Common Power Format (CPF)-enabled low-power flow to its design services customers. With the addition of MindTree, the PFI continues to increase its momentum and now has 27 members.
Fenix-DA Integrates Verific VHDL, Verilog Analyzers with Crossfire
Verific Design Automation said that Fenix-DA, developer of a new class of electronic design automation (EDA) tools aimed at quality assurance of integrated circuit (IC) design flows, has integrated Verific's VHDL and Verilog analyzers with Crossfire. Crossfire checks various views and formats of standard-cell libraries in an IC design-flow and validates that they all are alike. While Crossfire supported Verilog, it didn't support VHDL. Once Fenix-DA evaluated Verific's VHDL analyzer and implemented it with Crossfire, it replaced its internally developed Verilog analyzer with Verific's as well.
Cambridge Design Partnership Selects SolidWorks for Satmap Active 10
When Cambridge Design Partnership started development on the "Satmap Active 10" sports navigation system, computer aided 3D modelling was key to their design strategy and their success. Supported by Innova Systems, a leading UK SolidWorks supplier, Cambridge Design Partnership used the SolidWorks design tools as a powerful tool for communication between their engineers, clients, investors and retailers, ensuring that the product went to market at the right price and with all the right features. The Active 10 is now in production and enjoying success through retailers such as Blacks and Amazon.
Berkeley Design Automation Debuts Noise Analysis Tool for Analog, RF ICs
Berkeley Design Automation, Inc., provider of Precision Circuit Analysis(tm) technology for advanced analog and RF integrated circuits (ICs), announced the availability of the industry's first comprehensive noise analysis tool for complex analog and RF circuits. The tool, called the Noise Analysis Option(tm), handles every type of complex analog and RF circuit, including all analog-to-digital converters (ADCs), phase-locked loops (PLLs), DC:DC converters, frequency synthesizers, and voltage-controlled oscillators (VCOs). Leveraging Berkeley Design Automation award-winning Analog FastSPICE(tm) and RF FastSPICE(tm) technology, the Noise Analysis Option is fully compatible with existing flows, produces true SPICE accurate results, and is already silicon proven.
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