NextIO Adopts Synopsys VCS Functional Verification, VMM Methodology
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, announced that NextIO, a leader in I/O virtualization, has standardized on the VMM methodology, as defined in the Verification Methodology Manual (VMM) for SystemVerilog, and on Synopsys' VCS® functional verification product to accelerate the SystemVerilog-based verification of their newest I/O virtualization chip design. Pairing the VMM methodology with the VCS tool enabled NextIO to efficiently build highly accurate system-level and unit-level simulation environments that quickly identify design bugs. This complete verification environment enabled NextIO to achieve first-pass functional silicon success.
TI Introduces TPS62260LED Wireless Remote Control RGB LED Design Kit
Texas Instruments Incorporated (TI) (NYSE: TXN) continues to drive advancements in the lighting industry with the introduction of a wireless remote control RGB light emitting diode (LED) design kit. The TPS62260LED plus TI's award-winning eZ430-RF2500 development tool completes a fully supported platform to design new and exciting color lighting innovations for consumer, commercial, professional and architectural applications.
Sequence PowerTheater Reduces Power of DMP PICA200 IP Core by 50%
Digital Media Professionals Inc. (DMP), the world-class leader of 3-D graphics solutions, headquartered in Tokyo, Japan, has achieved a 50 percent reduction in power for their latest offering using Sequence Design's PowerTheater. DMP's PICA200 is an advanced, fully customizable multiprocessor design optimized for consumer applications including mobile devices, and has unmatched 3-D graphics capabilities while reducing overall system memory requirements.
Accellera Forms Verification Intellectual Property Technical Subcommittee
Accellera, the electronics industry organization focused on Electronic Design Automation (EDA) standards, announced that its Board of Directors answered electronic design verification tool users' requests by approving the formation of a new verification standards committee. The Verification Intellectual Property (VIP) Technical Subcommittee (TSC) is chartered to define standard technology and/or methods to realize a modular, scalable and reusable generic verification environment.
Jasper Design Automation Receives 7th Formal Verification Patent
Jasper Design Automation, provider of advanced formal verification solutions, announced a growing portfolio of innovative formal technology patents to help its worldwide customer base manage dramatically increasing SoC design complexity. The company is investing heavily in formal technology research and development (R&D). As a result of its aggressive and innovative R&D efforts, Jasper was granted its seventh patent by the U.S. Patent and Trademark Office.
Synopsys Invests In Prover Technology - Signaling Design Automation
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, and Prover Technology AB announced that Synopsys has invested in Prover, which supplies signaling design automation solutions for engineering the safety critical systems that control trains, switches and signals. The funds will enable Prover to accelerate its research and development efforts and expand its operations in Europe, North America and Asia.
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