The display interface provides a MIPI DSI bridge from the processor to an embedded DisplayPort LCD at 30 percent higher bandwidth than competing devices. The SN65DSI86 will be demonstrated at the Consumer Electronics Show in 2014.
- 1.5 Gbps DSI data rate
- Dual-channel, four-lane MIPI DSI
- 5 mm x 5 mm package
- Supports up to 4096 x 2160p LCD panels with 18 bpp at 60 fps
- 200 mW active, 30 mW suspend power, and 3 mW shutdown power consumption
The device’s small size saves PCB area and allows for greater flexibility for designers working on small form factor mobile applications. TI’s FlatLink serial interface portfolio manages short-haul links for small displays and mobile devices, and FDP-Link SERDES chipsets are used to support automotive applications or others with long-robust links.
The MIPI DSI lanes offer input bandwidth of 12 Gbps for high data throughput performance. eDP version 1.4 compatibility allows for support of seven data files up to 5.4 Gbps HBR2 for fewer wire and board traces between the device and LCD panel.