Application Note: Improved Circuit Design Flow using Modelithics Passive Models

Improved Circuit Design Flow using Modelithics Passive Models

AWR released an application note about the benefits of combining Modelithics Global Models for passive RLC components with AWR’s Microwave Office high-frequency design software. The improved design flow solution maps the impact that individual components have on sub-system performance such that trade-offs can be made with regard to component values and tolerance, enabling lower manufacturing costs and improved yield. The title of the technical paper is: Improved Circuit Design Flow using Modelithics Passive Models.

Improved Circuit Design Flow using Modelithics Passive Models

To fine-tune an RF/microwave design to meet new design criteria, engineers turn to the built-in optimizers within their electronic design automation (EDA) software. A typical optimization case for a microwave filter, for instance, might include goals for in-band insertion loss and return loss, cutoff frequency, and out-of-band rejection. The large number of criteria that the optimization engine then has to take into consideration to create a landscape of solutions that are more or less random, and, more often than not, quite large.

This application note presents a method for improved design flow efficiency with a goal of cost-effective first-pass design success. A solution is proposed that maps the impact that individual components have on sub-system performance so that a good trade-off can be made with regard to component values and tolerance (low tolerance equals more expensive, larger tolerance equals less expensive). This new method ultimately leads to lower manufacturing costs and improved yield.

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This application note illustrates a complete design flow with the use of statistically enabled models for yield and sensitivity analyses. It demonstrates that, starting with an ideal design, a nominal design that has good agreement to measurements can be achieved and then adjusted for improved yield while accounting for anticipated manufacturing tolerances. This same design flow is not possible with S-parameter models.

More info: Analog Devices Digital Potentiometers (pdf)