According to benchmark tests conducted by Deopli, Netlist’s HyperCloud HCDIMM memory modules help electronic design automation (EDA) professionals improve design productivity, reduce time to market and lower costs. HyperCloud HCDIMM memory improves memory bandwidth by 54% and EDA job runtime by 25% compared to LRDIMM. In comparison to RDIMM, HyperCloud HCDIMM offers a 17.6% memory bandwidth improvement and 8% EDA job runtime improvement.
HyperCloud HCDIMM memory utilizes a distributed buffer architecture to reduce latency and incorporates Netlist’s patented rank multiplication and load reduction technologies. Rank multiplication enables more DRAM capacity and load reduction reduces the loading to the memory interface allowing HCDIMMs to run at faster speeds at maximum capacity. HyperCloud is ideal for high-performance computing applications in industries such as EDA, financial services, oil & gas, aerospace and automotive design simulations.
By supporting multi-core processors with large capacity high speed memory, HyperCloud gives EDA professionals flexibility to run hardware and EDA software with increased server utilization thereby reducing design time and increasing design productivity. The use of HyperCloud HCDIMM memory in EDA is explained in Netlist’s technical paper on mastering EDA environments.
As semiconductor companies evolve with the development of new technology, Moore’s law (i.e., transistor count doubling every two years) continues to hold true for processor technology. However, the law no longer is valid for memory densities which have slowed in the last decade. As such, the trend is forcing the software and systems used to design these semiconductors to expand their use of memory to align with increased transistor count.
As an example, Electronic Design Automation (EDA) jobs that used to require 4GB of memory now require 8GB just to complete, while jobs that once needed 128GB of memory to run successfully now require 256GB and beyond. Compound the never-ending growth in memory demand with steadfast developments in processor technology (as processor count scales with multi-core technology), and we can conclude that systems are woefully behind in memory capacity as well as performance.
This lag represents a growing risk for EDA environments, as costs stand to balloon to geometric proportions.
The constraints in advancing memory design are the result of many factors. We will explore how memory technology is currently designed, how its cost is derived, and the barriers that exist in designing larger and more cost effective capacity. Throughout this process, the inherent need for denser and faster memory will become clear. Moreover, this paper shows how HyperCloud memory from Netlist, Inc., can help overcome these constraints by adding 384GB DRAM on the latest EP systems running at 1333 MT/s. This can enable an 8% improvement in an EDA job runtime.
More info: Netlist HyperCloud Memory