The Nexus 5001 Forum has ratified the IEEE-ISTO 5001-2012 Standard (Nexus 5001) for a Global Embedded Processor Debug Interface. The revised standard includes support for two new interfaces: IEEE Std. 1149.7 (JTAG) and the Nexus trace over a high-speed Xilinx Aurora SerDes (Serializers/Deserializers) interface. The standard was developed by the Nexus Forum, which is an industry group of IC companies, systems manufacturers and design automation companies.
The new Nexus 5001-2012 standard release adds a range of features. These features includes new transactions and interfaces that address the major challenges in the debug world, better support for more complex multi-core debug environments and higher performance trace interfaces to allow higher off-chip data throughput for more comprehensive in-silicon analysis.
Aurora, which is supported by Nexus 5001, is a high-performance, serial data link layer protocol. It is a low-latency, resource-efficient, open protocol developed by Xilinx that provides a transparent lower-level interface to the physical serial links transferring Nexus packets. Aurora enables access to the device’s transceiver capabilities and also lowers BOM cost through pin- and trace-count reduction.
To support more effective JTAG-based operations, the Nexus standard has integrated IEEE Std. 1149.7, a next-generation extension of JTAG that defines parallel JTAG TAPS and 2-pin JTAG interfaces, as well as 1149.1 JTAG. IEEE Std. 1149.7 was added because it offers features and options to support complex digital debug issues, including power management, and multiple-core CPUs.
Nexus interfaces also continue to support parallel auxiliary (AUX) buses that are widely used for trace in existing Nexus designs. The Nexus 5001-2012 standard is fully available to all Nexus 5001 Forum members and their affiliates.
More info: Nexus 5001 Forum