Microchip SST39VF80XC and SST39VF160XC Multi-Purpose Flash Plus Devices

Microchip Technology introduced their 8 Mbit SST39VF80XC and 16 Mbit SST39VF160XC Multi-Purpose Flash Plus (MPF+) devices. The SST39VF80XC is priced at $0.68 each (10,000-unit quantities) in a 6 mm x 8 mm 48-pin BGA package. The chip is also available in 4 mm x 6 mm 48-pin WFBGA and 12 mm x 20 mm 48-pin TSOP packages. Pricing for the SST39VF160XC starts at $0.98 each (10,000-unit quantities) in a 6 mm x 8 mm 48-pin BGA package. The device is also available in 4 mm x 6 mm 48-pin WFBGA and 12 mm x 20 mm 48-pin TSOP packages.

Microchip SST39VF1601C Features

  • Organized as 1M x16: SST39VF1601C/1602C
  • Low power consumption (typical values at 5 MHz)
  • Active current: 9 mA (typical)
  • Standby current: 3 µA (typical)
  • Auto low power mode: 3 µA (typical)
  • Hardware block-protection/WP Input Pin
  • Top block-protection (top 8 KWord)
  • Bottom block-protection (bottom 8 KWord)
  • Sector-erase capability
  • Uniform 2 KWord sectors
  • Block-erase capability
  • Flexible block architecture; one 8-, two 4-, one 16-, and thirty one 32-KWord blocks
  • Chip-erase capability
  • Erase-suspend/erase-resume capabilities
  • Hardware reset pin (RST)
  • Security-ID: SST: 128 bits, User: 128 words
  • Fast erase and word-program
  • Sector-erase time: 18 ms (typical)
  • Block-erase time: 18 ms (typical)
  • Chip-erase time: 40 ms (typical)
  • Word-program time: 7 µs (typical)
  • 48-lead TSOP (12mm x 20mm), 48-ball TFBGA (6mm x 8mm), 48-ball WFBGA (4mm x 6mm)
  • All devices are RoHS compliant

Microchip SST39VF801C Features

  • Organized as 512K x16
  • Low power consumption (typical values at 5 MHz)
  • Active current: 5 mA (typical)
  • Standby current: 3 µA (typical)
  • Auto low power mode: 3 µA (typical)
  • Hardware block-protection/WP Input Pin
  • Top block-protection (top 8 KWord)
  • Bottom block-protection (bottom 8 KWord)
  • Sector-erase capability
  • Uniform 2 KWord sectors
  • Block-erase capability
  • Flexible block architecture; one 8-, two 4-, one 16-, and fifteen 32-KWord blocks
  • Chip-erase capability
  • Erase-suspend/erase-resume capabilities
  • Hardware Reset Pin (RST)
  • Latched address and data
  • Security-ID: SST: 128 bits; User: 128 words
  • Fast erase and word-program
  • Sector-erase time: 18 ms (typical)
  • Block-erase time: 18 ms (typical)
  • Chip-erase time: 40 ms (typical)
  • Word-program time: 7 µs (typical)
  • Automatic write timing
  • Internal VPP generation
  • End-of-write detection
  • Toggle bits
  • Data polling
  • Ready/busy pin
  • CMOS I/O compatibility
  • JEDEC standard
  • Flash EEPROM Pinouts and command sets
  • 48-lead TSOP (12mm x 20mm), 48-ball TFBGA (6mm x 8mm), 48-ball WFBGA (4mm x 6mm)

More info: Microchip Technology