HHNEC-Synopsys 130nm Reference Flow 3.0

Synopsys and Shanghai Hua Hong NEC Electronics Company teamed on a 130-nanomter (nm) reference flow. The HHNEC-Synopsys Reference Flow 3.0 features the Synopsys Eclypse Low Power Solution. The reference design flow is available now from HHNEC. With the latest foundry flow, designers can leverage Synopsys’s strength in low power design and HHNEC’s manufacturing expertise.

HHNEC-Synopsys Reference Flow 3.0 Highlights

  • 130-nanomter (nm) reference flow
  • Includes the Synopsys Eclypse Low Power Solution
  • Implementation and verification capabilities of Synopsys’ Galaxy Implementation and Discovery Verification platforms
  • Enables engineers to deploy advanced low power techniques
  • Synopsys’ Formality solution for low power equivalence checking
  • MVRC for static rule checking
  • Power Compiler tool for power optimization
  • VCS with MVSIM for multi-voltage simulation
  • Validated using HHNEC’s in-house-developed cell library, SRAM, and IO Library for 130nm
  • Full low power cell library from HHNEC is ready for customer use
  • Test chip used to validate the reference flow features a multi-supply and multi-voltage design

More info: Synopsys | Shanghai Hua Hong NEC