Cadence Design Systems Expands Verification IP Catalog

Cadence Design Systems has expanded their portfolio of verification IP (VIP) and memory models for SoC, and System-level verification engineers and designers. The expanded Cadence VIP offering now supports all major third party simulators. As a result, Cadence offers designers a one-stop shop of mainstream and emerging protocols for developing and verifying advanced electronic designs.

Expanded Cadence VIP Catalog Highlights

  • Expanded protocol availability
  • Supports AMBA 4 specification, the latest MIPI protocols (M-PHY, DigRF and UniPro), PCI Express Gen 3, SuperSpeed USB, and Ethernet 40/100G
  • New memory models including DDR4, LRDIMM, and Flash ONFI 3.0
  • Addresses early IP verification and integration through to system validation
  • Supports all major third-party simulators
  • Enables engineers to deploy Cadence VIP on top of existing environments
  • Extended support of the Universal Verification Methodology (UVM)
  • New use models — including system validation with new accelerated VIP that addresses hardware/software integration
  • New SoC Portfolio that makes SoC verification more cost effective
  • New approach providing a programmer’s view of system verification
  • Roadmap for extending the solution to enable software-driven verification

More info: Cadence VIP Catalog