Atrenta Inc., the leading provider of Early Design Closure® solutions to radically improve design efficiency throughout the IC design flow, disclosed details of a collaboration with TSMC to enhance the quality of delivered synthesizable IP using Atrenta’s SpyGlass® platform. SpyGlass is Atrenta’s register transfer level (RTL) analysis and optimization product suite that analyzes and optimizes the quality of integrated circuit designs early in the design process, before expensive and time-consuming physical implementation begins.
Parameters such as syntax correctness, power consumption, clock synchronization, testability, timing constraints and physical routability are examined and optimized. GuideWare[tm] represents the prescribed reference methodology provided by Atrenta that results in the most efficient and effective use of the SpyGlass family.
TSMC and Atrenta will jointly define a subset of Atrenta’s GuideWare[tm] methodology for soft IP handoff and IP acceptance. Using Atrenta’s design metrics and datasheet generation capability, a series of comprehensive reports will be created automatically for each IP block and will be available to end customers. The reports will cover items such as completeness of the design intent for the IP, design profile statistics such as instance, flop and latch count and testability, timing and power information.
“TSMC focuses intently on the quality of deliverables associated with its IP ecosystem,” said Suk Lee, director, Design Infrastructure Marketing Division. “We searched for a methodology and toolset that would provide an accurate, objective assessment of any IP that is part of the TSMC IP ecosystem. Atrenta’s GuideWare methodology and SpyGlass family is expected to provide a robust capability to address these needs.”
“Increasing IP quality is a major goal to achieving the much needed design productivity improvements at advanced technology nodes,” said Dr. Ajoy Bose, chairman, president and CEO of Atrenta. “We have seen a growing application of our SpyGlass family to address the IP quality issue across our customer base. We are delighted to work with TSMC to help enable this critical solution for a large segment of the industry.”
The SpyGlass family is available exclusively from Atrenta.
Atrenta is the leading provider of Early Design Closure® solutions to radically improve design efficiency throughout the IC design flow. Customers benefit from Atrenta tools and methodologies to capture design intent, explore implementation alternatives, validate RTL and optimize designs early, before expensive and time-consuming detailed implementation. With over 150 customers, including the world’s top 10 semiconductor companies, Atrenta provides the most comprehensive solution in the industry for Early Design Closure.
Atrenta, the Atrenta logo, SpyGlass and Early Design Closure are registered trademarks of Atrenta Inc.