SynTest DFT PRO Plus Integrates with Magma Talus RTL-to-GDSII Design Flow

Magma® Design Automation (Nasdaq: LAVA), a provider of chip design software, announced a collaborative effort with MagmaTies Partner SynTest Technologies, Inc., provider of design-for-test (DFT) solutions, to integrate SynTest DFT PRO Plus products into Magma’s Talus® RTL-to-GDSII IC design flow. The integration complements Magma’s scan-based DFT methodology and mutual customers have validated the flow.

“This fully integrated IC design flow means we can handle large, complex designs through final tapeout with ease, and reduce development cycles,” said Josh Lee, president and chief executive officer of Uniquify. “It has clear benefits for designers because it preserves Magma’s productivity advantages in verification and low power, as well as in SynTest’s strengths in debug, diagnosis and ATE links.”

By combining Magma’s Talus Design RTL synthesis tool with DFT PRO Plus, design teams have a seamless link between fast, high-capacity logic synthesis and fast turnaround from register transfer level (RTL) through DFT analysis, insertion, test generation and verification. It includes a scan insertion capability using Talus Design, and exhaustive DFT analysis and auto-fix using SynTest TurboCheck-RTL/Gate. The integration adds an IEEE-compliant boundary-scan insertion, as well as memory BIST using SynTest TurboBSD and TurboBist-Memory, respectively. The integration gives design teams using Talus Design a seamless way to connect to SynTest’s VirtualScan[tm] ATPG test-vector compression technologies to generate XtremeCompact[tm] manufacturing vectors for commercial testers.

“We use Magma’s Talus RTL-to-GDSII tools and SynTest’s test technology extensively in developing our latest devices,” said Jacques Martinella, vice president of engineering of Sigma Designs. “This new tighter integration of SynTest’s test technology in the Magma IC design flow will enable us to improve our productivity and turnaround times while providing new capabilities that help us improve the testability of our advanced designs.”

For more information on the Magma and SynTest flow, visit Magma in booth 602, SynTest in booth 522 or Uniquify Inc. in booth 177 at the 47th Design Automation Conference (DAC) June 14-16 at the Anaheim Convention Center in Anaheim. For information on Magma’s other activities at DAC, visit www.magma-da.com/DAC2010.

About SynTest
SynTest Technologies, Inc., established in 1990, has been a member of the MagmaTies program since 2003. It develops intellectual property (IP) for advanced Design-for-Test (DFT) and Design-for-Debug/Diagnosis (DFD) applications including, logic BIST, memory BIST, boundary-scan synthesis, Scan/ATPG with test compression, concurrent fault simulation, and silicon debug and diagnosis. SynTest products, used throughout the world by semiconductor companies, system houses and design service providers, improve an electronic design’s quality and reduce overall design and test costs. SynTest is headquartered in Sunnyvale, Calif., and has field offices in Taiwan, Japan and China, and distributors in Europe, Asia, and Israel.

About Magma
Magma’s electronic design automation (EDA) software provides the “Fastest Path to Silicon”[tm] and enables the world’s top chip companies to create high-performance integrated circuits (ICs) for cellular telephones, electronic games, WiFi, MP3 players, digital video, networking and other electronic applications. Magma products are used in IC implementation, analog/mixed-signal design, analysis, physical verification, circuit simulation and characterization. The company maintains headquarters in San Jose, Calif., and offices throughout North America, Europe, Japan, Asia and India. Magma’s stock trades on Nasdaq under the ticker symbol LAVA.

Magma and Talus are registered trademarks and “Fastest Path to Silicon” is a trademark of Magma Design Automation Inc.