Xilinx, Inc. (Nasdaq: XLNX) announced six new development kits as part of its Targeted Design Platforms for enabling developers to focus on innovation and differentiation when designing with FPGAs. These development platforms for the Virtex®-6 and Spartan®-6 families significantly shorten the time it takes to reach optimal levels of system performance, while ensuring low levels of power consumption during system-on-chip (SoC) development. The new kits target embedded processing, DSP and the building of systems that require high-speed serial connectivity by providing design teams with optimized tool suites tuned to their design flow, fully functional IP, and Targeted Reference Designs common to their areas of expertise.
“Each of the new kits provides a validated starting point designers can use to bring their products to market quickly while at the same time including the tools they need to ensure their time is focused on innovation,” said Xilinx Director of Platform Marketing Brent Przybus. “By giving designers a complete and well tuned set of development resources, we can help them jump-start their designs and maximize their utilization of the truly innovative capabilities and features of the Virtex-6 and Spartan-6 FPGA families.”
Kits leverage FPGA device capabilities and ISE Design Suite innovations
The kits support development of designs with the Virtex-6 family of FPGAs for compute intensive, high-speed, high-density SoC applications, or the Spartan-6 family of FPGAs for applications where size, power, and cost are key considerations in addition to performance. Each kit takes advantage of key features within both FPGA families: Low power high-speed serial transceivers coupled with integrated PCI Express® End-point blocks, integrated memory controllers, as well as advanced high performance digital signal processing slices featuring pre-adder and advanced control functionality.
Each kit is supported by an edition of the ISE® Design Suite version 11.4, which delivers a 25% runtime reduction for Spartan-6 FPGA designs and a 30% runtime reduction for large, complex and highly utilized Virtex-6 SOC designs over the previous release.
All kits come with scalable development boards, fully functional domain specific IP (intellectual property) cores, Targeted Reference Designs, complete documentation and cables for starting development right out of the box. The Targeted Reference Design at the heart of each kit is tuned to the design domain they support and can be used ‘as is’ or modified and extended. Customers are also provided source code and simulation files that can be used within a design environment for building their end application.
The kits build upon the Spartan-6 FPGA and Virtex-6 FPGA base evaluation kits announced earlier this year and will be followed by market specific development kits offered by Xilinx and its ecosystem, such as the Virtex-6 FPGA Broadcast Connectivity Kit announced in November 2009 (www.xilinx.com/press/v6bck).
The Connectivity Development Kits contain Targeted Reference Designs that combine hard blocks within the FPGA with Xilinx connectivity IP, and key third-party IP from Xilinx Alliance Program member Northwest Logic to implement a fully scalable PCIe® to XAUI® or GbEthernet Bridge. Customers can choose fully compliant PCIe gen 1 or gen 2 x1, x2, or x4 in the Virtex-6 FPGA kit, tune DMA settings to optimize system bandwidth, write and read data from external DDR3 memory, and link to a full XAUI interface within a system environment. The Spartan-6 FPGA kit enables designers to link fully compliant PCIe gen 1 with GbEthernet using a full license of Northwest Logic’s DMA engine IP. Both kits enable designers to measure system bandwidth, as well as optimize settings for power and cost savings in a host system environment. The pre-loaded Targeted Reference Designs are optimized to demonstrate a fully functional connectivity system that uses four different clock domains running up to 250MHz.
The embedded development kits enable software developers to start development immediately using the Xilinx SDK (software development kit) environment that comes with the ISE Design Suite 11.4 Embedded Edition. They can run and modify example code that is provided as part of the Targeted Reference Design that utilizes a fully implemented MicroBlaze® 32-bit RISC soft processor core and a complete set of common processor peripherals including: UART, multi-port memory controller (MPMC), flash, tri-mode Ethernet MAC (TEMAC), general purpose I/O (GPIO), I2C/SPI, timers/interrupt controllers, and debug ports. With a library of peripherals available as part of the EDK (embedded development kit) environment, hardware designers can use the Base System Builder (BSP) feature to modify the reference design to achieve performance, power or resource optimizations by extending the code and optimizing key functions that can be moved to implementations that take full advantage of FPGA resources.
“Xilinx Spartan-6 FPGA Embedded Design Platforms have significantly reduced our effort to port our wireless compression algorithm software to the latest in low-cost FPGA technology,” said Product Design Services Manager Santosh R. Kulkarni at Tata Elxsi Ltd. “Using the pre-verified MicroBlaze processor sub-system design with DDR3 memory controller and Gigabit Ethernet, we were able to get our software up and running on the SP605 board within a few hours. We were also able to see more than a 50% performance increase compared to our previous generation design.”
“I’m quite impressed by the latest Spartan-6 FPGA Embedded kit from Xilinx. Within minutes of opening the kit, I was able to run the out-of-box demo and quickly evaluate the capabilities of the MicroBlaze processor sub-system with gigabit networking, video interfaces and also the Spartan-6 FPGA hard DDR3 memory controller running at 800Mbps,” said Research Engineer Nathan Jachimiec at Agilent Technologies. “The FMC daughter card interface on the board and the customizable Embedded reference design will enable me to easily interface and characterize my Gigabit Transceiver designs.”
Digital Signal Processing Development
The digital signal processing development kits will enable both algorithm and hardware developers to evaluate performance and implementation styles of common digital signal processing elements that can be used as building blocks in an end application. Each kit will contain a Targeted Reference Design optimized for Virtex-6 and Spartan-6 FPGAs and will utilize DSP IP and ISE Design Suite System Edition featuring the System Generator design environment.
Pricing and Availability
The Spartan-6 and Virtex-6 FPGA Embedded kits are available for order entry immediately for $995 and $2495 respectively including a full version of ISE Design Suite 11.4 Embedded Edition, Eclipse-based software development environment and unrestricted embedded IP. www.xilinx.com/embedded
The Connectivity Kit for Spartan-6 is available for order entry immediately for $2,495 and includes a full version of ISE Design Suite 11.4 Embedded Edition. The Connectivity Kit for Virtex-6 will be available for order entry in January 2010 for $2,995 and includes a full version of ISE Design Suite 11.4 Embedded Edition. www.xilinx.com/connectivity
Digital Signal Processing Development Kits for Spartan-6 and Virtex-6 will be available for order entry first quarter 2010. www.xilinx.com/DSP
The ISE Design Suite 11.4 is available separately list priced starting at US$2,995 for the Logic Edition. ISE Design Suite 11.4 includes expanded device speed grade support for Spartan-6 -1L and -4 as well as Virtex-6 HXT -3 as well as new package options for both families. Customers can download full-featured 30-day evaluation versions at no charge from www.xilinx.com/ISE.
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