Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic design innovation, and ARM, Ltd. [(LSE: ARM); (Nasdaq: ARMH)] announced that the two companies have entered into a strategic collaboration to create a next-generation SoC design flow that will accelerate time to market and lower the cost of SoC integration and verification. Under the terms of the agreement, the Cadence® Chip Planning System and Cadence Incisive® functional verification solutions will be combined with ARM® AMBA® Designer, Performance Exploration tools and Network Interconnect IP.
“Both ARM and Cadence have developed techniques to give our mutual customers better methods to optimize SoC integration architectures and IP selection, and provide VIP-based automation to speed both performance and functional verification time,” said Steve Glaser, corporate vice president, Strategy and Planning at Cadence Design Systems. “With the evolution of ever-more complex multi-media and multi-processor SoCs, there is a compelling need to find new ways to specify, optimize and verify both the performance and functionality of the SoC interconnect and the full SoC assembly.”
“ARM and Cadence expect our customers to achieve major efficiency savings through the integration of both AMBA system IP and associated Cadence and AMBA design tools,” said Michael Dimelow, director of marketing at ARM. “Early estimation of the power and cost of selected IP components enables customers to perform ‘what if’ calculations to optimize their SoC architectures. Generated traffic profiles from AMBA VPE rapidly tune the AMBA network interconnect performance, and Cadence metric-driven verification IP ensures functional integrity of the integrated IP at the SoC level.”
The capabilities and benefits of the combined flow will be demonstrated for the first time in the Cadence booth at the TechCon3 conference at the San Jose Convention Center, being held Oct. 21-23. The companies plan to deliver increasingly integrated solutions to joint customers in multiple phases through 2010.
Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry.
ARM designs the technology that lies at the heart of advanced digital products, from wireless, networking and consumer entertainment solutions to imaging, automotive, security and storage devices. ARM’s comprehensive product offering includes 32-bit RISC microprocessors, graphics processors, video engines, enabling software, cell libraries, embedded memories, high-speed connectivity products, peripherals and development tools. Combined with comprehensive design services, training, support and maintenance, and the company’s broad Partner community, they provide a total system solution that offers a fast, reliable path to market for leading electronics companies.
About AMBA and CoreSight
The ARM AMBA and CoreSight[TM] families of products deliver a range of system IP and tools to optimize ARM Cortex and Mali processor-based SoC designs. The product portfolio comprises network interconnect, SoC level debug and trace, dynamic memory and cache controller IP along with the configuration and performance exploration tools necessary to accelerate time to market. The AMBA and CoreSight families of products have been licensed by more than 40 leading semiconductor companies and are widely deployed across all consumer electronics product markets. These latest additions to the AMBA family raise the bar in both performance and ease of use. A white paper entitled “Traffic Management for Optimizing Media-Intensive SoCs” is available for download now at www.arm.com/pdfs/Traffic_Management_for_Optimizing_Media-Intensive_SoCs.pdf.