Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic design innovation, announced Américo Dias and Daniel Oliveira from the Microelectronics Students’ Group of the Faculty of Engineering of the University of Porto, Portugal, as the winners of its second electronic design automation (EDA) contest for students in EMEA (Europe, Middle East, and Africa). Cadence held this contest to discover the fastest and most accurate layout designer from top academic institutions across the EMEA region, and out of 60 applicants, Américo Dias and Daniel Oliveira were selected as the winners and have received the title ‘Fastest full custom layout designer of the year’ by Cadence in EMEA.
Students from Portugal, France, Germany, Poland, Netherlands, Greece, Sweden, and Austria signed up to participate and to demonstrate their skills learned on Cadence® Virtuoso® custom IC design platform. The rules were simple. On May 5th, 2009, registered participants received by e-mail a schematic of an analog block consisting of 30 transistors with a number of design and layout constraints. The participant who was the first to send back a correct implementation of the schematic using design rule check and layout versus schematic features back to Cadence was declared the winner. Américo Dias and Daniel Oliveira completed the assigned design task and correctly matched every constraint in about 6 hours.
“At Cadence, our intent has always been to collaborate closely with the leading universities across the region, to support first class education and to foster talents,” said Jacques-Olivier Piednoir, vice president of research and development at Cadence, in Sophia Antipolis, France. “This time, we wanted to encourage the participants to attend a contest focused on accuracy and speed, two design challenges that have an important impact on the successful delivery of innovative design products to the market.”
During the opening ceremony at CDNLive! EMEA, Cadence’s annual user conference being held in Munich from May 18-20, 2009, the winners will receive their award from Lip-Bu Tan, Cadence president and CEO, in front of hundreds of design engineers and industry experts. Free training from Cadence Education Services valued at € 1.400 is part of the award, along with the invitation to demonstrate their layout skills “live” with the other conference participants.
Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry.
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