Apache Design Solutions, the technology leader in power and noise integrity for chip, package, and system convergence, announced that they will be participating in several technical and business conference sessions at the upcoming DesignCon Conference held in Santa Clara, California. Apache’s key executives will be discussing the latest challenges and solutions in maintaining power, noise, and thermal integrity and driving convergence across IC, package, system, and SiP designers.
Worst-Case Switching Pattern for Core Noise Analysis (4-TA3) Technical Paper
Cisco Systems and Apache Design Solutions
Santa Clara Convention Center, Ballroom J
Tuesday, February 3, 10:15AM to 10:55AM
This paper demonstrates an optimum methodology to capture the worst-case switching activity when performing the power integrity analysis for the core power of ASIC.
Collaboration across the Changing Design Chain Business Forum Panel
Santa Clara Convention Center, Room 203/204
Tuesday, February 3, 2:00PM to 3:30PM
This panel will discuss the challenges faced by IC and system designers on reaping the benefits of SiP technology and what foundries and package providers are doing to make SiP a reality.
Multi-Die Chip/Package Co-Design for SiP Applications Technical Panel
Santa Clara Convention Center, Ballroom G
Tuesday, February 3, 3:45PM to 5:00PM
This panel will discuss the challenges faced by the IC and package teams as power, SI, reliability, thermal, stress, etc. issues further exacerbates design and validation of multi-die chips, and the solutions needed to address these challenges.
Apache will also be exhibiting at DesignCon in booth #514, demonstrating the industry’s leading power, noise, and reliability platform solutions for Chip-Package-System co-design. Attendees will learn how to mitigate the design risks induced by noise issues, reduce overall cost, and improve productivity and time-to-market.
Santa Clara Convention Center, Booth #514
Santa Clara, California
February 3 – 4, 2009
12:30PM – 6:30PM PST
About Apache Design Solutions
Apache delivers the industry’s leading power and noise analyses solutions from early-stage to signoff for chip, package, and system designs. Apache’s innovative platforms considers multiple noise sources that impact the design — such as power, signal, package / system IO, substrate, and temperature — and enables engineers to optimize and validate their designs. Certified by TSMC and Common Platform Reference Flows, Apache’s products are adopted by 80% of the top IDM, fabless semiconductor, and foundries for risk mitigation, cost reduction, and time-to-market improvements. Apache is a global company with R&D centers and direct sales / support offices worldwide.
Apache Design Solutions, NSPICE, RedHawk, PakSI-E, PsiWinder, Sahara, Sentinel, and Vectorless Dynamic are trademarks of Apache Design Solutions, Inc.