Bluespec announces the debut of its first webinar entitled “SCE-MI: Enabling Faster IP Verification with Emulation & FPGA Prototyping”, which introduces SCE-MI (Standard Co-Emulation Modeling Interface), the industry standard for co-emulation. The SCE-MI standard makes connecting software testbenches with hardware emulations and FPGA prototypes much easier.
The one (1) hour webinar will held on Wednesday, November 19, 2008 at 2:00pm EST. Rishiyur S. Nikhil, chief technology officer of Bluespec, will host.
The webinar is a one-hour, focused session introducing how SCE-MI is most commonly used and covering:
- SCE-MI’s architecture, capabilities and typical use models
- Performance considerations for co-emulation
- How SCE-MI will be used in the future and what automation will be required beyond SCE-MI
Register for this free webinar at https://bluespecevents.webex.com
Bluespec Inc. manufactures an industry standards-based Electronic Design Automation (EDA) toolset that significantly raises the level of abstraction for hardware design while retaining the ability to automatically synthesize high-quality RTL, without compromising speed, power or area. Elevating System-on-Chip (SoC) modeling, verification and implementation with atomic transactions, the only high-level abstraction for hardware concurrency, the general purpose toolset allows ASIC and FPGA teams to reduce development time, bugs and re-spins that contribute to product delays and escalating costs. More information can be found by calling (781) 250-2200.
Bluespec and AzureIP are trademarks of Bluespec Inc.