Calypto[tm] Design Systems Inc., the sequential analysis technology leader, announced it has added new sequential power optimizations and support for VHDL designs to PowerPro CG (clock gating), the industry’s only automated register transfer level (RTL) power optimization solution. Support for VHDL in PowerPro CG extends the benefit of power savings to more designers, in particular those in European consumer and wireless electronics companies where VHDL is the dominant design language. PowerPro CG automatically reduces power by reading a synthesizable RTL design captured in VHDL or Verilog and generating a RTL design identical to the original design with additional clock-gating enable logic.
“With each release of PowerPro CG, we have added powerful new sequential optimizations and enabling features such as VHDL support,” says Tom Sandoval, Calypto’s chief executive officer. “PowerPro CG has reduced power on hundreds of designs, across multiple applications worldwide and is the only fully automated RTL power optimization product on the market.”
PowerPro CG identifies sequential clock-gating enable conditions based on Calypto’s patented Sequential Analysis Technology. The new sequential optimizations added to PowerPro CG save additional power in heavily clock-gated RTL code, such as existing consumer and wireless designs that previously have been optimized manually. The latest release of PowerPro CG finds clock-gating enable conditions beyond those already present in the design. The output of PowerPro CG is comprehensively verified with sequential equivalence checking to ensure no functional changes are introduced.
The latest PowerPro CG release includes leading-edge graphical display and navigation features in the PowerPro Analyzer. These capabilities allow designers to thoroughly understand the sequential nature of the power optimizations added to their RTL code by PowerPro CG.
Pricing and Availability
The latest version of PowerPro CG is shipping now. It runs on Linux and is a no-cost upgrade for existing customers.
Founded in 2002, Calypto Design Systems Inc. empowers designers to create high-quality, low-power electronic systems by providing best-in-class power optimization and functional verification software, based on its patented sequential analysis technology. Calypto, whose customers include Fortune 500 companies worldwide, is a member of the Cadence Connections program, the IEEE-SA, Synopsys SystemVerilog Catalyst Program, the Mentor Graphics OpenDoor program, Si2 and is an active participant in the Power Forward Initiative. Calypto has offices in Europe, India, Japan and North America. Corporate Headquarters is located at: 2933 Bunker Hill Lane, Suite 202, Santa Clara, Calif. 95054. Telephone: (408) 850-2300.
Calypto, PowerPro, SLEC and Enabling ESL are trademarks of Calypto Design Systems Inc.