Virage Logic Corporation (NASDAQ: VIRL), the semiconductor industry’s trusted IP partner, announced its expanded business model based on the company’s deep collaboration with its manufacturing System-on-Chip (SoC) ecosystem partners. Together with its strategic foundry partners, Virage Logic is making available end-market optimized semiconductor intellectual property (IP) that enables designers to meet the growing challenge of cost effectively delivering highly differentiated products in increasingly narrow market windows. The expanded business model is based on new initiatives with Chartered Semiconductor Manufacturing (NASDAQ: CHRT, SGX-ST: CHARTERED) and IBM (NYSE:IBM) to provide foundry-sponsored IP optimized for key end-markets.
The consumer market, along with the wireless, computing, networking, and automotive markets are all examples of specialized end-market segments that demand highly optimized capabilities at advanced processes — such as 65-nanometer (nm) and below — which simply cannot be addressed with off-the-shelf IP. To achieve success in these market segments, companies must meet shrinking market windows and fluctuating consumer demand, yet still be first-to-market.
Virage Logic has a proven track record of providing advanced, highly specialized semiconductor IP to meet the needs of leading manufacturers of high-volume, high-complexity SoCs. In collaboration with its strategic foundry partners, Virage Logic’s expanded business model makes available foundry-sponsored IP that enables end users to bring products to market faster, while minimizing investment and risk.
“In today’s challenging global semiconductor industry, consolidation and restructuring of traditional business models are driving companies to outsourcing key elements of their designs to maximize profit margins and meet increasingly narrow windows of market opportunity. This change has provided Virage Logic with the opportunity to serve as a trusted semiconductor IP partner,” said Rich Wawrzyniak, senior analyst, Semico Research. “I believe Virage Logic’s impressive growth over the last year is based on its technology leadership and ability to anticipate customers’ future needs and move in that direction one step ahead of the market. This new expanded business model with their strategic foundry partners is yet another example of Virage Logic’s ability to meet evolving customer needs and truly serve as a trusted IP partner.”
“In our relationship over the past decade, Virage Logic has established itself as a trusted provider of silicon-proven IP that addresses crucial design challenges such as high performance, low leakage, silicon manufacturability, testability and volume production,” said Walter Ng, vice president of design enablement alliances at Chartered. “By targeting 65nm process technology from Chartered to provide Virage Logic’s SiWare[tm] Memory and SiWare[tm] Logic free of charge, we believe our mutual customers can start their designs earlier in the development process, in order to manufacture faster, lower-power, and more area-efficient SoCs.”
“Virage Logic has long been the market leader in providing highly differentiated IP, and through our expanded collaboration with our strategic partners, end users benefit with both easy access and manufacturing flexibility,” said Brani Buric, executive vice president of marketing, Virage Logic. “In addition, end users can also enjoy access to the full breadth of Virage Logic’s semiconductor IP offering that includes embedded SRAMs, embedded NVMs, logic libraries and DDR memory controller subsystems, plus award winning customer support services.”
Virage Logic is a leading provider of semiconductor intellectual property (IP) for the design of complex integrated circuits. The company’s highly differentiated product portfolio includes embedded SRAMs, embedded NVMs, embedded test and repair, logic libraries, memory development software, and DDR memory controller subsystems. As the industry’s trusted semiconductor IP partner, foundries, IDMs and fabless customers rely on Virage Logic to achieve higher performance, lower power, higher density and optimal yield, as well as shorten time-to-market and time-to-volume.