Mentor Graphics Corp. (NASDAQ: MENT) and Cadence Design Systems, Inc. (NASDAQ: CDNS) announced the release of the latest version of the open-source Open Verification Methodology (OVM). OVM 2.0 includes the new OVM User Guide, which provides step-by-step guidelines to help users develop reusable, interoperable verification IP and hierarchical environments to facilitate plug-and-play verification. The new release extends the proven sequential stimulus mechanism in the OVM with transaction-level modeling (TLM) interfaces to improve the modularity and reuse of stimulus sequences. Other enhancements include direct support for parameterized classes in the OVM factory and built-in debug support for TLM connections throughout the hierarchy.
The OVM User Guide provides straightforward documentation on all aspects of the OVM, including an extensive review of TLM for verification, guidelines for developing reusable OVM verification components, instructions for building verification tests, and in-depth discussions on the more advanced features of the OVM. The guide also includes an extensive example showing how to apply these concepts to the creation of a full hierarchical verification environment, including tests that configure the environment and select the desired stimulus sequences to exercise the required functionality.
“The release of version 2.0 of the OVM is a significant event for verification teams,” said Tommy Kelly, CEO of Verilab. “It builds on the previous release of the methodology, further enhances the capabilities of engineers interested in reusable, interoperable verification environments, and strengthens overall the case for using the OVM. Verilab is deploying the OVM in its own verification IP development, and supports the use of the methodology at several of its international clients. We are delighted to see this development.”
The release of OVM 2.0 continues the strong technical collaboration between Mentor Graphics and Cadence in providing the most comprehensive, vendor-independent verification methodology available today. The enhancements available in OVM 2.0 implement many of the user recommendations received in the interactive forum on OVM World and provided by the OVM Advisory Group, demonstrating the continued commitment of both companies to provide the industry’s best solution for accomplishing verification tasks quickly and easily.
About the Open Verification Methodology
The Open Verification Methodology, based on IEEE Std. 1800[TM]-2005 SystemVerilog standard, is the first open, language-interoperable SystemVerilog verification methodology in the industry. It provides a methodology and accompanying library that allow users to create modular, reusable verification environments in which components communicate with each other via standard transaction-level modeling interfaces. It also enables intra- and inter-company reuse through a common methodology and classes for virtual sequences and block-to-system reuse, and full integration with other languages commonly used in production flows.
About the OVM Advisory Group
The Open Verification Methodology Advisory Group, established in Februarys 2008, is an organization of distinguished users and ecosystem suppliers helping to develop new features and capabilities for the OVM. Founding members of the OVM Advisory Group include ARM; Cisco Systems, Inc.; Denali Software, Inc.; Freescale Semiconductor, Inc.; IBM Corp.; Infineon Technologies; Nokia Corp; STMicroelectronics NV and Xilinx, Inc.
About Mentor Graphics
Mentor Graphics Corporation (NASDAQ: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $850 million and employs approximately 4,500 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.
Cadence enables global electronic-design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2007 revenues of approximately $1.6 billion, and has approximately 5,100 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry.
Cadence is a registered trademark and the Cadence logo is a trademark of Cadence Design Systems, Inc. in the United States and other countries. Mentor Graphics is a registered trademark of Mentor Graphics Corporation.