Sequence Design, the EDA leader in Design for Power (DFP)[tm] solutions, hosts its third annual low-power System-on-Chip (SoC) design Seminar in Bangalore on Wednesday, Sept. 10 beginning at 9am. Notable speakers from business and academia will highlight the day’s events – followed by a luncheon. The seminar will be held at the Hotel Leela Palace, Bangalore.
Interested parties may register by sending an e-mail to Sequence India’s Subrata Mukherjee at email@example.com.
The keynote speaker is Mr. Manmohan Mittal, Vice President of Engineering for InSilica, a leader in custom ASIC design and image processors. Mr. Mittal will address today’s low-power challenges and solutions for major manufacturers.
Sequence customers Mr. Jithendra Srinivas, from Texas Instruments, and Mr. Shashidhara Bapat, from LSI Corporation will provide real-world examples of design success using advanced low-power EDA tools from Sequence. Also on hand will be Dr. Bharadwaj Amrutur, Assistant Professor, Indian Institute of Science, Bangalore, who will offer insights on the progress of R&D and technology trends in the low-power chip design realm.
For an overview of new products and technologies from Sequence, Mr. William Ruby, Vice President of Products & Application Engineering; and Mr. Rahul Prasad, the company’s Senior Manager, Worldwide Application Engineering & Customer Support, will describe advanced technologies for RTL low-power optimization such as the new PowerArtist[tm]. Launched earlier this year at the Design Automation Conference, PowerArtist -,built upon Sequence’s industry-leading power-analysis technologies, -significantly increases productivity by offering the flexibility to either pinpoint and manually edit RTL, or reduce power automatically with multiple techniques for clock, datapath and memory sections of complex SoCs.
“Our DFP seminar has become one of the most keenly anticipated events in Bangalore’s chip design engineering community, spurred by the demand to reduce power in “green” products with applications ranging from mobile computing, gigabit Ethernet, graphics to server farms. – said Vic Kulkarni, Sequence President and CEO. “We believe there is no more interesting, necessary, or -mission-critical challenge facing the industry than low-power design, and we look forward to a lively and informative day with our Bangalore colleagues.”
Sequence Invests In India
A company with global reach, Sequence maintains sales, support, and R&D facilities in the United States, Japan, and in India. In the past six years, Sequence has invested Rs. 25 Crores (over $6 million) in its India-based R&D operations alone. The company has a growing customer base of multinational semiconductor companies in India, particularly in Bangalore’s technology-rich environment, and has expanded its “Center of Excellence” in Noida’s Logix Techno Park.
Sequence Design’s DFP solutions accelerate the ability of SoC designers to bring high-performance, power-aware ICs quickly to market. Sequence’s power and signal-integrity software give customers the competitive advantage necessary to excel in aggressive technology markets. Sequence is an active participant in industry organizations advancing low-power design technologies such as the Power Forward Initiative and holds a seat on the board of Si2.