Altera Corporation (Nasdaq:ALTR) and XtremeData will be demonstrating an easy-to-use accelerator solution based on the MATLAB® environment and the graphical block diagramming oriented Simulink® interface at the Intel Developer Forum ’08 (IDF) being held in San Francisco, August 19-21, at Moscone Center West. The solution allows Intel® Xeon-based algorithm developers to develop, simulate and verify their Altera Stratix® III FPGA-accelerated algorithms without having to understand hardware description languages.
This push button solution is enabled by several interfaces and tools:
- Intel’s QuickAssist Technology: interfaces the Intel Xeon® operating system to the XtremeData accelerator module, which makes the development process easier for developers while enabling better end-products
- Altera’s DSP Builder: is integrated with Simulink to enable optimization of the hundreds of DSP blocks in the FPGA for algorithm acceleration
- Altera’s SOPC Builder and Avalon® Streaming interface/switch fabric: is used in the FPGA to integrate the data streaming in/out from Xeon memory to Simulink-generated logic blocks
- XtremeData’s Reference Design: is used as a starting point for software and hardware designers to short cut overall development time
This solution is comprised of these software components, the XtremeData XD2000i[tm] Xeon In-Socket Accelerator[tm] (ISA) and standard CPU server hardware.
Target applications include image and signal processing, radar, FFT filters, FIR filters and frequency conversion. This demo showcases a polyphase filter example that splits a signal into sub-bands, a function that is sometimes used in radar, MPEG and other types of signal processing.
See this demonstration at the Altera/XtremeData booth #727 in the I/O and Application Acceleration Community.
Additional information: Intel Developer Forum
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