SEMATECH’s thought leaders and technical experts will be on hand during SEMICON West, July 15-17, 2008, to discuss technical and manufacturing solutions that will enable continued progress in device scaling. SEMATECH President and CEO Dr. Michael Polcari said, “Throughout the week, the semiconductor community will have the opportunity to hear our technology experts address the industry’s most critical challenges and provide unprecedented access to the information needed to guide implementation of strategies and best practices.”
The lineup includes an appearance by John Warlaumont, SEMATECH’s vice president of advanced technology, as a keynote speaker at JEMI France and SEMI’s co-organized seminar on “Strategic Research Alliances.” Warlaumont will join four other executives in addressing the importance of collaborative research alliances in the semiconductor and related industries during a technical session beginning at 10:30 a.m. Tuesday, July 15 in the Golden Gate (A2) Conference Room of the San Francisco Marriott.
Additionally, four expert technologists representing SEMATECH and its subsidiary International SEMATECH Manufacturing Initiative (ISMI) will appear on the Device Scaling TechXPOT Stage. Their talks, which will cover front-end scaling, enhanced fab productivity, extreme ultraviolet lithography, emanufacturing, and nanoscale metrology — are detailed below.
“CMOS Scaling for High-Mobility Channels”
Prashant Majhi, Front End Processes program manager for CMOS Scaling, SEMATECH
10:50 a.m. Tuesday, July 15
Majhi will address trends in CMOS scaling and the impact of key process elements on performance — including increasing reliance on new materials and architectures, the development of non-planar alternatives, and the need to reduce operating voltages — and how these trends can be addressed through heterogeneous integration and system level improvements.
“The Green Fab Challenge: Going Clean, Going Green”
10:50 a.m. Wednesday, July 16
James Beasley, Environmental Safety and Health technology manager, ISMI
Beasley will discuss ISMI efforts to produce a standard methodology and approach for evaluating and certifying semiconductor facility environmental performance based on the U.S. Green Building Council’s Leadership in Energy and Environmental Design (LEED) Green Building rating system.
“Metrology Readiness for the 45-32nm Nodes”
Benjamin Bunday, Project Manager of CD Metrology and Senior Member Technical Staff, ISMI
11:10 a.m. Wednesday, July 16
Bunday will highlight the status of CD, overlay, thin film and defect metrology equipment for future manufacturing, and will present high-level results from ISMI’s Metrology program as compared to the specified requirements from the ITRS.
“3D Device Issues at 22nm Node and Beyond”
Rusty Harris, Front End Processes project manager for non-planar CMOS, SEMATECH
3:50 p.m. Wednesday, July 16
Harris will explore several key requirements for making 3D devices a reality and will look ahead at the future of 3D devices.
For 20 years, SEMATECH® has set global direction, enabled flexible collaboration, and bridged strategic R&D to manufacturing. Today, we continue accelerating the next technology revolution with our nanoelectronics and emerging technology partners.