Aldec ALINT 2008.06 Features Clock Domain Crossing Rule Sets

Aldec, Inc., a pioneer in mixed-language simulation and verification for ASIC and FPGA devices, announced ALINT 2008.06. The software compares Verilog source code against 195 design rules based on STARC® 2006. ALINT gives engineers instant feedback on structural, coding and consistency problems early in the design verification cycle. New enhancements to ALINT 2008.06 include the addition of 15 new STARC rules, a new GUI including an advanced violation viewer, configuration manager and dedicated Clock Domain Crossing (CDC) rule-sets.

Optimization of Clock Domain Crossing (CDC)
ALINT offers a comprehensive solution for clock and reset analysis, detecting potential clock domain crossing (CDC) issues. Combinational logic between asynchronous clock domains can lead to metastable conditions, and metastable conditions lead to circuit malfunctioning. ALINT detects whether or not the designer located combinational logic between asynchronous clock domains. Clock violations can be detected early in the verification process, aiding with clock line balancing, timing analysis and correct clock data.

Advanced Violation Viewer
ALINT includes a standalone application, the Violation Viewer, which enables engineers to view all violations that occur in source code and cross-probe to any HDL editor. Double-clicking on any violation reported in the violation viewer cross-probes directly to the line of Verilog source code that caused the violation. All violations are sorted by their type — files, modules, rule-sets, or rules — and are printable. Rules and rule descriptions are displayed in association with each violation. A summary of all violations can be viewed within the violation viewer at all times.

Configuration Management
A flexible rule configuration mechanism, the Configuration Manager, enables engineers to use existing pre-defined rule-sets and policies, or to create custom rule-sets by using the “Add Custom Rule-Set” feature, selecting or de-selecting rules from the master list of 195 STARC based design rules. Rules can be combined together in different ways by simple drag and drop within the configuration manager to form rule-sets and policies that are treated by ALINT as a single object. The rule, rule description, rule-set and policy properties can be easily configured, providing additional flexibility in design analysis.

Additional Capabilities
ALINT 2008.06 includes new optimization of expressions for synthesis emulation, such as Boolean, arithmetic and RTL expression optimizations. Additionally, new support for netlists, including vector output for block and chip level netlists and additional modeling extensions, have been added.

Availability
ALINT is available today and includes the Violation Viewer, Configuration Manager, HDL Editor, 195 STARC based design rules and lint engine. The product is sold directly from Aldec and its authorized worldwide distributors.

About STARC
Semiconductor Technology Academic Research Center (STARC®) was established in December 1995 with investment from Japan’s leading semiconductor suppliers to reinforce semiconductor design capability. Since its inception, STARC has been conducting joint research with universities and the semiconductor industry to strengthen the research of semiconductor technology at domestic universities. STARC is co-funded by 11 member companies including Fujitsu Limited, Matsushita Electric Industrial Co., Ltd., NEC Electronics Corporation, Oki Electric Industry Co. Ltd., Renesas Technology Corporation, Rohm Co., Ltd., Sanyo Semiconductor Co., Ltd., Seiko Epson Corporation, Sharp Corporation, Sony Corporation, and Toshiba Corporation.

About Aldec
Aldec Corporation is an industry leader in electronic design and offers a patented technology suite including: design entry, HDL simulators, co-simulation, design rule checking, hardware-assisted verification, co-verification, IP Cores, DO-254 compliance tool sets and engineering specialty solutions. Established in 1984, Aldec is a privately held company with continuous revenue growth and employs approximately 200 people worldwide. Corporate headquarters are located at 2260 Corporate Circle, Henderson, Nevada 89074.

ALINT is a trademark of Aldec, Inc.