Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, and UMC (NYSE: UMC)(TSE: 2303), a world-leading semiconductor foundry, announced the release of a low power design reference flow supporting UMC’s 65-nanometer (nm) technology. The new reference design flow includes comprehensive RTL-to-GDSII design capabilities based on the Unified Power Format (UPF) standard and supports methodologies for hierarchical, multi-voltage design, low-leakage libraries from UMC and full integration with Synopsys’ Eclypse[TM] Low Power Solution.
UPF is the industry standard for enabling design teams to specify low power design intent at each stage in the flow. Advanced low power design methodologies demonstrated in the new reference flow include techniques for effectively managing and minimizing dynamic and static power consumption within the design. The Eclypse Low Power Solution, which supports advanced techniques including power shut-down, clock gating, Multi-Vt, dynamic voltage and frequency scaling (DVFS), helps manage these design challenges via its UPF support, which spans the entire design flow. Combined with unique capabilities including voltage-aware verification with automated multi-voltage assertions, automated power gating and enhanced low power clock-tree synthesis, this solution adds new capabilities to enhance the UMC 65-nm low power design flow.
The new low power design reference flow utilizes UMC’s 65-nm low-leakage libraries to take advantage of multi-voltage and power gating techniques by integrating UMC’s low-power intellectual property (IP). Synopsys Professional Services and UMC validated the new low-power design reference flow using the “LEON” open-source 32-bit RISC microprocessor core, which is partitioned into multiple voltage regions. The validated reference design is highly configurable and expandable with additional digital and analog/mixed-signal IP modules.
“We have partnered with Synopsys to bring proven low power capabilities to our customers,” said Stephen Fu, director of Digital IP Development Division at UMC. “The flow, enabled by UPF, represents the latest techniques to address the power design needs of our mutual customers and shortens the time to market with a validated flow for UMC’s advanced processes.”
“Synopsys’ low power technology is an integral part of the 65-nanometer low power design reference flow developed in partnership with UMC,” said Rich Goldman, vice president of Corporate Marketing and Strategic Market Development at Synopsys. “Our collaboration resulted in a low power design reference flow offering silicon-proven methodologies and techniques from Synopsys coupled with trusted IP and manufacturing expertise from UMC — providing our customers with the latest technology and innovative design solutions.”
The UMC/Synopsys 65-nm low power design reference design flow enabled by UPF is slated for availability in August 2008. Customers should contact UMC for more information.
UMC (NYSE: UMC)(NYSE: TSE:)(NYSE: 2303) is a leading global semiconductor foundry that manufactures advanced system-on-chip (SoC) designs for applications spanning every major sector of the IC industry. UMC’s SoC Solution Foundry strategy is based on the strength of the company’s advanced technologies, which include production proven 90nm, 65nm, mixed signal/RFCMOS, and a wide range of specialty technologies. Production is supported through 10 wafer manufacturing facilities that include two advanced 300mm fabs; Fab 12A in Taiwan and Singapore-based Fab 12i are both in volume production for a variety of customer products. The company employs approximately 13,000 people worldwide and has offices in Taiwan, Japan, Singapore, Europe, and the United States.
Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design and manufacturing. Synopsys’ comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan, Asia and India.
Synopsys and Eclypse are registered trademarks or trademarks of Synopsys, Inc.