ETRI Adopts Target IP Designer Tool Suite

Korea’s Electronics and Telecommunications Research Institute (ETRI) and Target Compiler Technologies, the leader in ASIP design tools, announced that ETRI selected Target’s IP Designer tool-suite for the design and programming of next-generation digital signal processors for mobile multi-media applications. ETRI has been developing its next-generation Embedded Media Processor (EMP), a shared-memory multi-core processor for audio and video processing, and selected Target as its tools provider for EMP. ETRI already successfully integrated Target’s IP Designer tool suite to design its next-generation EMP platform. The new EMP core will be demonstrated at this week’s Design Automation Conference. ETRI is now designing a many-core SoC for mobile multi-media applications, consisting of several instances of the EMP core.

Thanks to the architectural exploration capabilities of the IP Designer tool suite, ETRI has been able to optimize the instruction-set architecture of its EMP core for efficient audio and video processing. Also, ETRI automatically obtained a software development kit (SDK) for the EMP core, consisting of a C compiler, instruction-set simulator, and a JTAG-based on-chip debugger. The SDK is already being deployed to ETRI’s customers and research partners, who are developing their own applications for EMP in C code.

“Our previous DSP architecture lacked a commercially supported SDK,” said Bon-Tae Koo, leader of the Application SoC Development Team in ETRI’s IT Convergence & Components Laboratory. Koo continued: “For our new EMP core, we needed a high-quality SDK with an excellent C compiler. We evaluated Target’s IP Designer and had the C compiler up and running in less than one month of time. It was an easy decision to engage with Target as our long-term partner for processor design tools.”

“The code quality produced by Target’s C compiler is truly impressive,” said Young-Su Kwon, ETRI’s lead architect for EMP. “Our DSP has a specialized architecture with tight constraints on the allowed memory and register usage. Within a few weeks from the start of our cooperation, we were able to compile our signal processing benchmark suite on EMP, and observed that the resulting code was both compact and fast. Moreover, the compiler showed us opportunities for optimizing EMP’s instruction-set architecture. The interplay between compiler generation and architectural optimization in Target’s IP Designer tool-suite is a true innovation to SoC designers,” Kwon added.

Gert Goossens, Target’s CEO commented as follows: “We are extremely pleased with ETRI’s engagement to use our tools. In recent years, ASIPs have seen a widespread adoption in SoCs for multi-media and communication systems. Korea is one of the hotspots for multi-media and communications products, and ETRI has been instrumental to that success. We expect that our cooperation with Korea’s leading telecommunications research institute will stimulate a wider use of our technology by Korean chip and system manufacturers.”

Target’s IP Designer tool-suite is used by engineers to design, optimize and program application-specific processor cores (ASIPs). IP Designer is used all the way from architectural exploration through to implementation and verification. ASIPs are primarily used in one of two ways. First, they are used to provide greater algorithmic/computational efficiency (measured as performance/$/watt) than solutions built on standard embedded processors. Second, they are used to provide post-silicon flexibility (through programmability) to designs that might otherwise be built in hard-coded RTL. Both uses are becoming increasingly commonplace in today’s SoC and FPGA designs.

ETRI marks one of several design wins announced today by Target. ETRI’s new EMP DSP will be demonstrated at the 45th Design Automation Conference in Anaheim, in Target’s booth no. 2322.

About ETRI
ETRI is an innovative research and development organization in Information & Communication Technologies (ICT). It has been playing a key role in boosting Korean ICT technologies for more than 30 years. ETRI has successfully commercialized advanced and new technologies such as DRAM, CDMA, DMB (Digital Multimedia Broadcasting) and WiBro (Wireless Broadband). ETRI has more than 1,900 researchers in its Daejeon campus. Over 96% of them have master’s or doctor’s degrees. ETRI is performing major government-funded projects from the Korean Ministry of Knowledge and Economy, the Ministry of Education, Science and Technology, the Broadcasting and Communications Commission, and so on. ETRI has more than 1,000 international patents. ETRI generates about 70% of the total royalty income of all government supported research facilities in Korea. It has transferred its technologies to 385 companies and its accumulated royalty income exceeded US$ 485 million in 2006. ETRI Journal is the fourth in the world to be registered in SCI (Science Citation Index) following AT&T, BT and IBM.

About Target Compiler Technologies
Target Compiler Technologies is the leading provider of retargetable software tools to accelerate the design, programming and verification of application-specific processor cores (ASIPs). Target’s IP Designer tool suite has been applied by customers worldwide for diverse application domains, including GSM, WCDMA and HSDPA handsets, VoIP, audio coding, automotive infotainment, ADSL and VDSL modems, wireless LAN, hearing instruments, mobile image processing, video processing, and various control and interfacing applications. Target is a spin-off of IMEC, is headquartered in Leuven, Belgium, with North American operations in Boulder, Colorado.