A five-member team from the Massachusetts Institute of Technology (MIT) won the top honors in the second annual hardware/software co-design contest sponsored by the ACM-IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008). The winning design was completed using the Bluespec general-purpose high-level synthesis environment. Though the design was subdivided across three designers, completed in approximately three weeks, and the only entry implemented 100% in hardware, the team debugged the system level design directly on the FPGA platform, avoiding system simulation while still passing the required testbench and eight test cases.
With a solution that outperformed second place by an order of magnitude, Kermin Fleming, Myron King, Man Cheuk Ng, Asif Khan and Muralidaran Vijayaraghavan from MIT’s Computer Science and Artificial Intelligence Lab were judged overall winners of the design contest by the MEMOCODE 2008 contest judging panel. 27 teams from commercial companies and universities started the contest, with eight teams submitting final design solutions.
“With two wins in a row, we are extremely happy for the MIT team and proud of our high-level synthesis environment,” says Charlie Hauck, Bluespec’s chief executive officer (CEO). “Bluespec’s atomic-transaction level design enables FPGAs to be leveraged for SoC development in ways previously unimagined, for modeling, software development and verification at timeframes significantly earlier in the design cycle. The MIT team was able to show in a dramatic fashion just how quickly FPGAs can be employed.”
The challenge was to sort large databases of encrypted data using any hardware and software design methodology targeting any field programmable gate array (FPGA) development platform. Contest organizers Krste Asanovic of UC Berkeley, James C. Hoe of Carnegie Mellon University, and Patrick Schaumont of Virginia Tech provided a software-only starter reference solution for the Xilinx XUP development board. A description of this year’s contest and a summary of the completed solutions are available here: rijndael.ece.vt.edu/memocontest08/. Last year’s contest description and summary of completed solutions are available here: www.ece.cmu.edu/~jhoe/distribution/mc07contest/.
MEMOCODE 2008 gathers researchers and practitioners in the field of the design of modern hardware and software systems to explore ways in which future design methods can benefit from new results on formal methods. It is sponsored by the Association of Computing Machinery (ACM) Special Interest Group on Embedded Systems (SIGBED) and Special Interest Group on Design Automation (SIGDA), IEEE Circuits and Systems Society (CAS) and IEEE Council on Electronic Design Automation (CEDA).
Bluespec Inc. manufactures an industry standards-based Electronic Design Automation (EDA) toolset that significantly raises the level of abstraction for hardware design while retaining the ability to automatically synthesize high-quality RTL, without compromising speed, power or area. Elevating System-on-Chip (SoC) modeling, verification and implementation with atomic transactions, the only high-level abstraction for hardware concurrency, the general purpose toolset allows ASIC and FPGA teams to reduce development time, bugs and re-spins that contribute to product delays and escalating costs. More information can be found by calling (781) 250-2200.
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