Carbon Design Systems[TM], the leading supplier of tools for the automatic creation, validation and deployment of virtual hardware models, announced that Carbon Model Studio supports STARC Transaction Level Modeling Guidelines. This announcement is the result of an extensive evaluation of Carbon Model Studio across a number of different designs. Carbon Model Studio is proved to reduce the development time by compiling register transfer level (RTL) code directly into cycle-level system models, which can be easily integrated into a variety of system modeling environments. Carbon Model Studio gives design teams a way to easily move between RTL code and system models but without sacrificing any of the accuracy required for effective system validation, according to STARC.
In addition to the ease of model development and accuracy provided by Carbon Model Studio, the resulting models are optimized to provide the high performance required by system validation.
“The cost and complexity of systems on chip force organizations such as STARC to look for solutions that support system validation,” says Yahiro Shiotsuki, team leader of STARC’s System Level Design Group, Development Department-2. “Models developed using Carbon Model Studio have been validated to work within the ‘Transaction Level Modeling Guide’ defined by STARC.
“These models will enable our member companies to start their system validation efforts earlier and be more confident in their results.”
“Carbon Model Studio has proven that it is an effective tool to generate implementation-accurate system models that can be compiled directly from RTL, instead of requiring multiple man-months of development effort,” states Scott Seaton, Carbon’s vice president of sales. “Carbon provides modeling groups, chip-level architects and firmware teams the fastest path to bring up a transaction-level model of their complete system-on-chip.”
About Carbon Design Systems
Carbon is the leading supplier of system-level tools to automatically create, validate and deploy software models generated from Verilog and/or VHDL descriptions. Carbon’s models are used in conjunction with SystemC simulation platforms to enable architecture profiling and software validation in parallel with hardware development. Problems can be found and resolved early in the design cycle, rather than waiting for prototypes to be built or silicon to be delivered. Its solutions are based on open industry standards, including SystemC, SCML, Verilog, VHDL, OSCI TLM, MDI, CASI, CADI and CAPI. Carbon’s customers are systems, semiconductor, and IP companies that focus on communications, networking, and consumer electronics. Carbon is headquartered at 125 Nagog Park, Acton, Mass., 01720. Telephone: (978) 264-7300. Facsimile: (978) 264-9990. Email: email@example.com.
The Semiconductor Technology Academic Research Center (STARC) is a research consortium co-founded by major Japanese semiconductor companies in 1995 and based in Yokohama, Japan. STARC’s mission is to contribute the growth of the Japanese semiconductor industry by developing leading-edge system-on-chip (SoC) design technologies.
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