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Pyxis Technology to Feature 45nm Design Closure at DAC 2008

Posted by Ken Cheung in Events, Training on Friday, May 30, 2008

New game, new rules, new technology – that’s how Pyxis Technology describes design closure at 45nm. At the Design Automation Conference (DAC) in Anaheim, California, from June 9th through 12th, Pyxis will be demonstrating how its correct-by-construction, high-performance integrated circuit (IC) routing software helps designers like those on Microsoft’s XBOX team close designs faster, with fewer design rule violations, faster IC performance, and lower power.

Pyxis activities at DAC include:

Demonstrations of NexusRoute, a next generation, high performance, yield-aware IC router
June 9th through 12th, 2008
Booth 374, Anaheim Convention Center
For: Designers, design managers
Please register for a demonstration at www.pyxistech.com

  • 45nm Design Closure: High level overview of the NexusRoute architecture and features, giving quantitative examples of how customers have used the tool to improve IC routability, performance, power and predicted yield. Highlights key architectural features required for 45nm design closure and contrasts these with existing router architectures, followed by a discussion on integration of the router into existing design flows.
  • Structured Custom Design and Chip Finishing: High level overview showing NexusRoute’s use of the OpenAccess in-memory model to seamlessly integrate with other tool environments. Highlights the integration of NexusRoute with the Laker chip editing tool from SpringSoft and shows examples of the power of a next-generation 45nm IC router in a full-custom layout environment.

DAC Exhibitor Forum presentation on “High Performance Yield-aware IC Routing for Accelerated 45nm Design Closure” by Pyxis CEO Phil Bishop.
9:15 to 9:55am on Wednesday, June 11th
Anaheim Convention Center, Exhibit Hall D, Booth 2849
For: Designers, design managers
Exhibitor Forum presentations are open to all registered DAC attendees

About Pyxis
Pyxis Technology delivers software and services to address the problems that chip designers face in the design closure of advanced high performance integrated circuits (ICs) and systems on a chip (SoCs). Pyxis NexusRoute is a high performance, yield-driven IC router, architected for process technologies of 45nm and below. Based on open, industry standard interfaces and easily integrated into existing design flows, NexusRoute simultaneously optimizes runtime, design rule correctness, timing, power and yield. Using NexusRoute, customers have seen as much as a 4X improvement in design closure turnaround time. Pyxis Professional Services help customers maximize design closure performance, yield and manufacturability within their existing design environments.

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