Sequence Design’s Tom Miller, Vice President and Head of R&D, Front-End Products, is one of the featured authors in a new book, “A Practical Guide to Low-Power Design – User Experience with CPF,” that has been released by the Power Forward Initiative (PFI). The book can be downloaded free of charge. The Sequence chapter, “Early Power Analysis with CPF,” details how the biggest power reductions can be achieved during architectural tradeoffs and describes multiple techniques for power analysis and optimization along with real-world examples of these approaches in action.
“PFI has gathered an impressive list of expert contributors for this book, and are once again demonstrating how the Common Power Format (CPF) helps maintain design integrity throughout the flow, while creating an environment to maximize power savings in complex designs,” Miller said.
For example, Sequence’s PowerTheater can analyze designs using multiple-supply voltages and power shutoff techniques to help users make design tradeoffs at RTL resulting in more power-efficient designs, and then generate an output CPF file that captures the design intent originally specified as well as derived design intent. This CPF file will be more complete based on the automatic generation of level shifter, isolation and power switch rules as well as a complete description of the power modes that may need to be filled out, resulting in fewer errors passed to downstream tools.
In addition to Sequence, contributors to the new book include ARC, ARM, Faraday, Freescale, Fujitsu, NEC Electronics, NXP, and TSMC. PFI will be showcasing the new book in Si2′s DAC Booth 1614.
About Power Forward Initiative
The Power Forward Initiative, which has more than 25 member companies, is an industry initiative sponsored by Cadence that was formed in May 2006. It has the goal of enabling the design and production of more power-efficient electronic devices. The initiative includes companies representing a broad cross section of the design chain including system, semiconductor, foundry, IP, EDA, ASIC and design services companies. CPF was contributed by Cadence to the Si2 Low Power Coalition in December 2006 and CPF 1.0 is now available as an Si2 standard to the industry at large. The Initiative has recently published “A Practical Guide to Low-Power Design – User Experience with CPF” which is aimed at educating the broad design marketplace in utilizing advanced low-power design techniques. The Guide is available free of charge.
Sequence Design’s Design For Power (DFP) solutions accelerate the ability of SoC designers to bring high-performance, power-aware ICs quickly to market. Sequence’s power and signal-integrity software give customers the competitive advantage necessary to excel in aggressive technology markets. Sequence is an active participant in industry organizations advancing low-power design technologies and holds a seat on the board of Si2.