Magma(r) Design Automation Inc. (Nasdaq:LAVA), a provider of chip design software, announced Hydra(tm), an automated floorplan synthesis and hierarchical design planning product with physical optimization capabilities that delivers superior predictability. Unlike existing floorplanning and prototyping tools, Hydra takes timing, power, congestion and area into consideration and generates an implementation-ready floorplan, reducing turnaround time of very large designs.
Hydra combines automated chip planning, automated partitioning and physical block shaping, top-level clock-tree generation and time budgeting for block-level implementation, dramatically improving designer productivity. Unlike traditional approaches that require manual macro placement, Hydra is the first product to offer a fully automated shape-aware and congestion-aware macro placer, enabling rapid and optimal placement of macros without time-consuming manual interventions.
Hydra can be used in third-party flows or integrated with Magma’s Talus(r) IC implementation system. Used in conjunction with Talus Design or Talus Vortex, Hydra offers seamless integration from prototyping to implementation within the same data model. Hydra is seamlessly integrated with RioMagic(tm), Magma’s package-aware chip planning solution, enabling early I/O planning and placement tradeoffs for both peripheral and flip-chip packages and full-chip DRC-clean 45-degree redistribution layer (RDL) routing.
“Most of the complex multimillion-gate systems-on-chip (SoCs) we implement today contain many macros,” said Josh Lee, president and CEO of Uniquify. “With traditional tools, macro shaping and placement is a time-consuming, manual process. Hydra’s automated macro shaping and placement capabilities can significantly reduce the time we spend on this task and on overall floorplanning, helping us meet our goal of exceeding customer expectations.”
“As IC designs continue to grow in size and complexity, manual floorplanning and hierarchical design techniques must be augmented by automated solutions,” said Kam Kittrell, general manager of Magma’s Design Implementation Business Unit. “With its unique level of automation, physical optimization and analysis capabilities, Hydra offers an open system that generates high-quality floorplans, making Hydra a ‘must-have’ tool for today’s designers.”
Hydra: Automated, Accurate Floorplan Synthesis for Reliable Timing Closure
Designers can manage the complexity of multimillion-gate designs and reliably achieve timing closure thanks to a number of Hydra capabilities:
- Full hierarchical methodology supports bottom-up block-based flows, top-down black-box flows and mixed bottom-up/top-down flows with automated floorplanning, partitioning and time budgeting.
- Early design planning is possible using a netlist consisting of a mix of gates, RTL, macros, black-box models and GlassBox(tm) models. Provides quick design prototype feedback for floorplan, design and timing constraint refinement.
- Automated hierarchy management, physical partitioning, macro placement and soft block shaping not only save considerable runtime and manual effort, but also provide better timing, area and quality of results.
- Relative Floorplanning Constraints(tm) eliminates manual intervention when changes need to be made in logical hierarchy or size and shape of physical partitions.
- Leverages the same placement, timing, routing and analysis engines as the Talus IC implementation platform, ensuring a highly predictable flow.
- Based on Magma’s unified data model, Hydra enhances productivity and provides ease of use by eliminating unnecessary, error-inducing and time-consuming file transfers.
Hydra is available as a standalone product, or integrated within the Magma flow. For pricing and other information, email firstname.lastname@example.org. Or, visit Magma’s website to register for an in-depth demo on Hydra at the Design Automation Conference, June 8-13 in Anaheim, www.magma-da.com/DAC.
Magma’s software for designing integrated circuits (ICs) is used to create complex, high-performance chips required in cellular telephones, electronic games, WiFi, MP3 players, DVD/digital video, networking, automotive electronics and other electronic applications. Magma’s EDA software for IC implementation, analysis, physical verification, circuit simulation and characterization is recognized as embodying the best in semiconductor technology, enabling the world’s top chip companies to “Design Ahead of the Curve”(tm) while reducing design time and costs. Magma is headquartered in San Jose, Calif., with offices around the world. Magma’s stock trades on Nasdaq under the ticker symbol LAVA.
Magma and Talus are registered trademarks, and “Design Ahead of the Curve,” GlassBox, Hydra, Relative Floorplan Constraints and RioMagic are trademarks of Magma Design Automation Inc.