Xyalis, the layout finishing solution’s company, announced GTmask, a fully integrated environment dedicated to complex wafer masks building. Based on Xyalis’ existing tools, GTmask offers new capabilities fully meeting mask teams’ demands, covering wafer assembly and floorplanning for chip arrays, multi-project wafers and multi-layer reticles; CMP metal filling; automatic frame generation; and optimized GDSII and jobdeck files generation. The GTmask tool suite is part of Xyalis product strategy aiming at establishing direct links between process data management tools and SQL-based administration databases.
As process geometries are shrinking, mask data preparation (MDP) complexity is soaring as well as databases sizes, threatening to add extra delays into the design for manufacture (DFM) flow. Furthermore, according to a 2007 Frost & Sullivan study, mask costs are expected to keep up growing: a mask set costs about $800,000 at 90 nm, and at least $1.2 million at 65 nm (1). Adding to the MDP flow complexity, multi-project wafers (MPWs) and multi-layer reticles (MLRs) services are now provided by foundries to reduce mask costs. Xyalis (Grenoble, France) is the only independent company offering to mask assembly teams a full line of tools solving these issues. All company’s tools work within an easy-to-use graphic environment, boosting the teams’ productivity. Scripting capabilities also allow the users to integrate each module into their current flow.
“After many years of leadership in multi-project wafers management, Xyalis has extended its offer to provide a fully integrated Mask Data Prep environment”, stated Philippe Morey-Chaisemartin, CTO of Xyalis. “With our new maskbuilder, layer management and frame generator modules, MLRs and MPWs, we offer a fast, efficient and safe MDP flow. These additions were specified by working closely with semiconductor industry leaders.”
GTmask is built upon Xyalis’ wafer floorplanning and assembly tool (GTmuch), a proven solution able to place hundreds of chips in minutes, which has received a number of enhancements and addresses three main steps in mask building: MPW assembly, CMP fill and frame generation. “A typical wafer using 30 mask levels can be generated within half a day,” added Morey-Chaisemartin. “And the system helps to reduce mask and silicon cost as well as time to market.”
Multi-project multi-layer assembly module
Xyalis’ high end assembly tool handles the complete set of mask layers of a chip; OASIS layers as well as GDSII layers; multi-project wafers (assembling multiple GDSII/OASIS databases from different designs on one wafer); any scale reticles (2.5X, 4X, 5X); and multi-layer reticles (placing different layers of a same design onto a single reticle, with automatic matricing).
Added to the wafer map management tool, new multi-criteria placement optimizations allow the user depending on his current needs, to maximize the number of dies and/or to minimize the number of shots. A manual fine tuning capability helps to handle the frame and chip stepping, dynamically computing the number of dies and photos. A graphic wafer description tool gives the user full control of relevant parameters (notch, flat size & position, unusable perimeter, forbidden areas…). Functions like chip grouping, and automatic removal and query of chips and frames, help enhance the user’s productivity.
To increase manufacturability regarding the chemical-mechanical planarization process step (CMP), an option to fill empty spaces with dummy tiles is also available. Dummy cells are customizable, as are insertion rules. Dummy cells come as single OASIS/GDSII files, or as multiple files with jobdeck files (placement directives for mask writing tools).
The new GTframe module automatically inserts process and mask specific items (test structures, alignment marks or any GDSII files), for both regular chip arrays and MPWs. Automatic frame instantiation is also available for reticles, with the possibility to use mask templates. Barcodes or titles are also inserted into the scribe lines, between the chips of an MPW project or around the reticles.
OASIS, MEBES compatibility
The final data can be generated either as a single database or as multiple databases plus a standard jobdeck file. The split of the final database can be adjusted to offer the best compromise between jobdeck complexity and files size.
To meet new demands from the semiconductor world, Xyalis tools now handle both classical GDSII and newer OASIS chip layout database formats. The GTmask tool suite is also able to read and write files in the MEBES mask writing format. This makes it easy to include GTmask into existing flows.
Linking technical and administrative mask databases
One of the key benefits of the GTmask tool suite is the safe handling of large databases, including process description, imported and merged GDSII databases validation, and layer management for complex MPWs and MLRs. The next step will be to establish a direct link with SQL databases for mask management and ordering applications.
(1) The Advent of Next Generation Lithography Technologies in Advanced Semiconductor Processing, aug 2007
Established in 1998, Xyalis is headquartered in Grenoble, and is now the leading specialist in layout finishing and GDSII processing software. Designed to solve problems which the major ECAD companies do not address, the range consists of GTtiler, GTmuch, GTviewer, GTcheck, GTreplace, GTpickcell and GTlayer. Conversion tools which translate GDSII to OASIS (and vice versa) are also available. Linux/UNIX systems are either Intel x86 and Itanium, AMD, Sun Solaris or HP-UX workstations.