Berkeley Analog FastSPICE Qualifies for TSMC 40/65 Nanometer SPICE

Berkeley Design Automation Inc., provider of Precision Circuit Analysis[tm] technology for advanced analog and RF integrated circuits (ICs), announced that its Analog FastSPICE[tm] circuit simulator is qualified through TSMC’s 40/65-Nanometer SPICE Tool Qualification Program. The program improves simulation accuracy, shortens transistor-level simulation cycle time, and increases simulation capacity for high performance digital circuits and mixed-signal RF designs.

“Berkeley Design Automation Analog FastSPICE met the 40 Nanometer SPICE Tool certification requirements on device model certification and SPICE netlist compatibility qualification,” said Tom Quan, Deputy Director of Design Service Marketing at TSMC.

Berkeley Design Automation tools include Analog FastSPICE[tm] circuit simulation, Noise Analysis Option[tm] device noise analyzer, RF FastSPICE[tm] periodic analyzer, and PLL Noise Analyzer[tm]. The company guarantees identical waveforms to the leading “golden” SPICE simulators down to noise floor (typically 0.1% or less) while delivering 5 to 10 times higher performance and 5 to 10 times higher capacity. It achieves this by using advanced algorithms and numerical analysis techniques to rapidly solve the full-circuit matrix and the original device equations without any shortcuts that could compromise accuracy.

Design teams from top-10 semiconductor companies to leading startups use Berkeley Design Automation tools to solve big analog/RF verification problems. Typical applications include characterizing complex blocks (e.g., PLLs, ADCs, DC:DC converters, PHYs, Tx/Rx chains) and running performance simulation of full circuits (e.g., wireless transceivers, wireline transceivers, high-speed I/O macros, memories, microcontrollers, data converters, and power converters).

“Our qualification and certification via the TSMC 40/65-Nanometer SPICE Tool Qualification Program is a very important milestone to support our mutual customers’ continued success,” said Ravi Subramanian, president and CEO of Berkeley Design Automation. “The timing of this qualification of Analog FastSPICE by TSMC is especially important because of the growing number of nanometer analog, RF, and mixed-signal design starts requiring true SPICE accuracy, unparalleled performance, and capacity for complex analog/RF verification.”

About TSMC Active Accuracy Assurance Initiative
TSMC AAA initiative is a broad-based program that encompasses all components of the design ecosystem. It provides standards of accuracy to all TSMC partners, including EDA vendors, IP providers and library developers, and Design Center Alliance (DCA) partners. TSMC applies the same standards to tools, building blocks, and technologies, including TSMC Reference Flow 8.0, design for manufacturing (DFM) tools, process design kits (PDK), design support and backend services.

About Berkeley Design Automation
Berkeley Design Automation, Inc. is the recognized leader in advanced analog/RF verification. Its Precision Circuit Analysis technology combines the accuracy, performance, and capacity needed to verify GHz designs in nanometer-scale silicon. Berkeley Design Automation has received numerous awards including EDN Magazine’s 2006 Innovation of the Year, the 2006 Red Herring 100 North America, and the 2007 Red Herring Global 100 Finalist. Founded in 2003, the company is funded by Woodside Fund, Bessemer Venture Partners, Matsushita Electric Industrial Co. Ltd., and NTT Corporation.

Analog FastSPICE, Noise Analysis Option, RF FastSPICE, PLL Noise Analyzer, WaveCrave, and Precision Circuit Analysis are trademarks and Berkeley Design is a registered trademark of Berkeley Design Automation, Inc.