Digital Media Professionals Inc. (DMP), the world-class leader of 3-D graphics solutions, headquartered in Tokyo, Japan, has achieved a 50 percent reduction in power for their latest offering using Sequence Design’s PowerTheater. DMP’s PICA200 is an advanced, fully customizable multiprocessor design optimized for consumer applications including mobile devices, and has unmatched 3-D graphics capabilities while reducing overall system memory requirements.
“Power usage is an important consideration for these devices,” said Wataru Yokozeki, Business Development Director of DMP. “PowerTheater’s ability to analyze power at a high level has proven to be immensely valuable by allowing us to optimize our architecture to maximize power reduction. We also found its vector and peak power analysis particularly useful during the design of this core, we could eliminate power-bugs using these capabilities.”
According to Yokozeki, they were able to seamlessly integrate PowerTheater into their existing design flow, and he cited the tool’s ease of use and advanced visualization capabilities as a major benefit. “Partnering with Sequence for power analysis and optimization has contributed greatly to the success of PICA,” he said.
“World-class design teams can take advantage of PowerTheater’s advanced RTL power analysis features today, just as DMP did,” said Hiroshi Ishikawa, General Manager of Sequence Design, KK. “Our customers worldwide are using this technology to routinely achieve similar results.”
PowerTheater is the industry’s first RTL power analysis and power prototyping solution with the singular ability to accurately analyze power at RTL and support power management techniques such as voltage islands, mixed voltage threshold, power gating, and clock gating. PowerTheater recently added support for the Si2 CPF standard along with the following new features:
- Control all aspects of running PowerTheater through a single Tcl-based command file.
- Identify high power windows utilizing comprehensive simulations from hardware accelerators.
- Compute full-chip, gate-level power efficiently using RTL simulations.
- Prevent voltage-drop related test and functional failures by automatically identifying critical vectors from multiple simulations.
PowerTheater-Explorer is an innovative capability that adds state-of-the art power visualization and debug features for fast, interactive RTL power analysis. A new SmartSource Viewer allows designers to determine hot spots in the design, to visualize, debug and interactively analyze a design’s power consumption. The hierarchical RTL power tree display shows hot spots that can be cross-probed to schematics, showing connectivity and indicating how activity is moving through the design and how instances impact one another. These results can be displayed and analyzed at RTL, gate, or mixed levels of abstraction. SmartSource also provides a dedicated view of the clock tree for fast analysis and tracing of clock nets in the design.
DMP develops products based on creative ideas in the realm of graphics technology, an area that we believe has the potential for unlimited innovation. Our mission is to make products that enrich the user experience, and we intend to lead the way to a brand new world of contents and applications. DMP is currently developing next-generation 3-D graphics processors (from DMP’s IP core) for the embedded market with a focus on the digital consumer, including products such as mobile phones, handheld games, navigation systems, and arcade games.
Sequence Design’s Design For Power (DFP) solutions accelerate the ability of SoC designers to bring high-performance, power-aware ICs quickly to market. Sequence’s power and signal-integrity software give customers the competitive advantage necessary to excel in aggressive technology markets.