Certess, STMicroelectronics Offer Hands-on Tutorial at DAC
Certess, Inc., the provider of functional qualification tools for systems on a chip (SoCs) and intellectual property (IP) blocks, will partner with STMicroelectronics and Brian Bailey Consulting to give a hands-on tutorial on the functional verification and integration of design IP at the 45th annual Design Automation Conference (DAC 2008) in Anaheim on June 9th. Attendees will gain hands-on experience in setting up Certess’ Certitude for an existing verification environment, analyzing specific verification weaknesses and improving verification strategy.
Tela Innovations to Demonstrate On-Grid, Straight-Line Chip Design
Tela Innovations, an early-stage technology company focused on addressing the challenges of scaling semiconductor manufacturing to 45nm and beyond, will showcase its innovative chip design technology at two upcoming industry events. The company will make presentations and demonstrate its technology at the Applied Materials Technical Symposium at IITC (International Interconnect Technology Conference) on June 2, 2008 in San Francisco, and the following week at the 2008 Design Automation Conference June 8-12 in Anaheim, California.
2008 International Conference on Computer Aided Design
With continued strong participation from around the world, including North America, Europe, and Asia, the International Conference on Computer Aided Design (ICCAD) received nearly 500, high-quality technical paper submissions. Final acceptance notifications will be distributed on June 25, 2008, and the final program will be published on the website in August 2008. ICCAD will be held from November 10-13 at the DoubleTree Hotel in San Jose, California.
Javelin Design Automation Debuts j360 Floorplanning, Prototyping Platform
Javelin Design Automation, provider of System Physical Prototyping[tm] (SPP) EDA solutions for Systems-in-Silicon, unveiled its j360[tm] with TrueFit[tm], TruePlan[tm] and TruePro[tm]: the first-of-its-kind specification-driven virtual silicon prototyping platform tool suite for the enterprise customer. Javelin’s j360 can realistically predict and optimize designs for implementation feasibility and quality-of-results (QoR) in parallel to their design development at the electronic system-level (ESL), register transfer-level (RTL) and netlist stages of design. Its “spec-driven” floorplanning capabilities enable users to “plug and play” data from any abstraction level including spreadsheet, black-box, ESL, RTL, gate-level, LEF/DEF, GDSII and foundry technology models. In this way, users can prototype blocks and chip as they exist in concept and actual design files at any point in the design process.
Pyxis Technology to Feature 45nm Design Closure at DAC 2008
New game, new rules, new technology – that’s how Pyxis Technology describes design closure at 45nm. At the Design Automation Conference (DAC) in Anaheim, California, from June 9th through 12th, Pyxis will be demonstrating how its correct-by-construction, high-performance integrated circuit (IC) routing software helps designers like those on Microsoft’s XBOX team close designs faster, with fewer design rule violations, faster IC performance, and lower power.
Apache Design to Hold IP Validation Hands-On Tutorial at DAC
Apache Design Solutions will host a hands-on tutorial at this years’ 45th Design Automation Conference (DAC), titled “IP Validation for Macro and Embedded SoC.” The tutorial gives attendees first-hand experience in running Apache’s products for validating embedded macro, analyzing full-chip power including package, and generating portable power delivery network model for co-design.
TDK Develops GBDriver HS1 microSATA Solid State Drive Controller for SSD
TDK Corporation announced that it has completed development of the GBDriver HS1 solid state drive (SSD) controller for SSDs used in laptop PCs and industrial system hardware that employs PC platforms and completed commercialization and began shipments of the HS1 series of SSDs equipped with this controller. Currently, SSDs that use NAND flash memory are employed in industrial system hardware and laptop PCs, but in addition to high prices, there are limits to NAND flash memory reliability and technology, and many users including PC manufacturers are hesitant to use NAND flash memory for applications that require the highest levels of reliability.
Ethernet Direct Announces Industrial Networking Seminars at Computex
Ethernet Direct Corporation, a professional and primary provider of industrial networking and communication solutions, is offering FREE brief product seminars focusing on Industrial Ethernet Networking and communications. These seminars will be held in Agora Garden Hotel in Taipei, Taiwan in connection with the Computex 2008 Show event.
Adeneo, Atmel, Microsoft Offer Windows Embedded CE 6 Training Session
Adeneo announced with Atmel and Microsoft a Windows Embedded CE 6.0 Training Session in Paris – FRANCE from 23rd to 27th of June 2008. This event is the perfect opportunity for OEMs willing to start a Windows Embedded CE on a powerful platform like Atmel ARM9 based on AT91SAM9261 chip. The goal of this training is to provide an in depth understanding of all Windows Embedded CE internal mechanisms, and to teach all technical information needed to start using Win CE for OEM designs. To make it practical and give a better understanding of how Windows CE is implemented in hardware, the course is adapted to show examples on Atmel’s ARM9-based microcontroller development platform.
Synopsys Unveils HAPS-51T High-performance ASIC Prototyping System
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, is introducing a new addition to the popular HAPS[tm] (High-performance ASIC Prototyping System[tm]) product family from the company’s Synplicity® Business Group. The HAPS-51T, leveraging the advanced capabilities of Xilinx’s Virtex®-5 LX330T devices, is an ideal prototyping system for applications using high-speed serial interfaces like PCI Express, SATA and Gigabit Ethernet. The HAPS-51T utilizes the LX330T device’s 24 RocketIO GTP transceivers, adding on-board DDR2 memory and the new HapsTrak high-speed daughterboard connectivity scheme in a compact form factor. These features enable HAPS-51T to deliver a significant advantage in performance and versatility.
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