Lattice Semiconductor, Aldec Team on OEM FPGA Mixed Language Simulator

Lattice Semiconductor Corporation (NASDAQ: LSCC) and Aldec, Incorporated announced a new OEM agreement that will deliver the only OEM FPGA mixed language simulator. Active-HDL Lattice Edition will be bundled with Lattice’s ispLEVER® design tool suite, providing mixed language simulation (VHDL, Verilog and SystemVerilog), co-simulation with Simulink® from The MathWorks(tm) and simulation support for Lattice encrypted IP Cores.

“We’re excited to partner with Lattice and bundle our powerful mixed language simulator with Lattice’s FPGA solutions,” said David Rinehart, vice president of marketing at Aldec. “Active-HDL Lattice Edition is derived from an industry-proven FPGA solution that offers the performance and functional capabilities that Lattice FPGA designers increasingly require to efficiently verify their designs.”

Chris Fanning, corporate vice president, enterprise solutions, said, “Our alliance with Aldec enables Lattice to offer exceptional design verification capabilities that deliver incomparable value when bundled with our ispLEVER design tool suite. Our alliance with Aldec marks another milestone in Lattice’s commitment to deliver industry leading solutions to our FPGA customers.”

About Active-HDL Lattice Edition
Active-HDL Lattice Edition boasts high performance simulation for Lattice designs, mixed HDL language support and a host of productivity enhancers ranging from testbench generation from a graphical waveform to co-simulation with The MathWorks Simulink. Active-HDL Lattice Web Edition is designed for single language simulation, either VHDL or Verilog, and smaller designs more typical of devices supported by the ispLEVER Starter and ispLEVER Classic tools.

Features

  • Support for all Lattice CPLD/FPGA devices
  • Mixed VHDL, Verilog, and SystemVerilog (Design) simulation support
  • Testbench generation from waveforms
  • Batch mode simulation
  • Macro, Tcl/Tk and PERL script support
  • Simulation of Lattice encrypted IP
  • Code execution tracing
  • Advanced breakpoint management
  • Graphical waveform viewer and editor
  • Memory viewer
  • Simulink co-simulation (from within ispLEVER Design Tool Suite)

About the Lattice ispLEVER Design Tool Suite
The ispLEVER design tool suite is the flagship design environment for the latest Lattice FPGA products. It provides a complete set of powerful tools for all design tasks, including project management, IP integration, design planning, place and route, in-system logic analysis, and more. The ispLEVER suite is provided on CD-ROM and DVD for Windows, UNIX or Linux platforms. ispLEVER Windows includes industry leading third party tools from Lattice partners Synplicity and Aldec for synthesis and simulation.

Pricing and Availability
Active-HDL Lattice Edition will be bundled with the next version of Lattice’s ispLEVER design tool suite. Active-HDL Lattice Web Edition will be made available free of charge to support the many users of Lattice’s ispLEVER Classic and ispLEVER Starter design tools. Lattice’s ispLEVER 7.1 for Windows, including Aldec Active-HDL Lattice Edition, will be available without charge for customers with active design tool maintenance contracts. The price of the full ispLEVER design tool suite starts at $895 for the Windows version.

About Aldec
Aldec, Inc. established in 1984, is committed to delivering best value-in-class products to government, military, aerospace, telecommunications, automotive and industrial customers. Aldec offers a patented technology suite of robust EDA verification products including: design entry, software simulators, co-simulation, linting software, prototyping, hardware accelerators, hardware emulators, co-verification solutions, IP Cores, DO-254 compliance solutions and engineering services. Continuous innovation, superior product quality and total commitment to customer service comprise the foundation of Aldec’s corporate mission.

About Lattice Semiconductor
Lattice Semiconductor Corporation provides the industry’s broadest range of Programmable Logic Devices (PLD), including Field Programmable Gate Arrays (FPGA), Complex Programmable Logic Devices (CPLD), Mixed-Signal Power Management and Clock Generation Devices, and industry-leading SERDES products. Lattice continues to deliver “More of the Best” to its customers with comprehensive solutions for system design, including an unequaled portfolio of high-performance, non-volatile and low-cost FPGAs. Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in communications, computing, industrial, consumer, automotive, medical and military end markets.

Lattice Semiconductor Corporation, Lattice (& design), L (& design), ispLEVER and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries. Aldec and Active-HDL are either registered trademarks or trademarks of Aldec, Incorporated or its subsidiaries in the United States and/or other countries.